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Searched refs:SYSCON_CLKSET_PLL_X2FBD2_SHIFT (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/cpu/arm920t/ep93xx/
Dspeed.c32 rate *= ((clkset >> SYSCON_CLKSET_PLL_X2FBD2_SHIFT) & 0x3f) + 1; in get_PLLCLK()
/external/u-boot/board/cirrus/edb93xx/
Dedb93xx.c31 24 << SYSCON_CLKSET_PLL_X2FBD2_SHIFT | \
/external/u-boot/arch/arm/include/asm/arch-ep93xx/
Dep93xx.h634 #define SYSCON_CLKSET_PLL_X2FBD2_SHIFT 5 macro