Searched refs:S_BIT (Results 1 – 8 of 8) sorted by relevance
1050 if (!(texGenEnabled & S_BIT)) { in r200_need_dis_texgen()1054 needtgenable |= S_BIT; in r200_need_dis_texgen()1058 if (((texGenEnabled & S_BIT) && planeS[1] != 0.0) || in r200_need_dis_texgen()1065 if (((texGenEnabled & S_BIT) && planeS[2] != 0.0) || in r200_need_dis_texgen()1072 if (((texGenEnabled & S_BIT) && planeS[3] != 0.0) || in r200_need_dis_texgen()1117 if (texUnit->TexGenEnabled & S_BIT) { in r200_validate_texgen()1169 if (needtgenable & (S_BIT | T_BIT)) { in r200_validate_texgen()1184 (texUnit->TexGenEnabled & S_BIT) ? texUnit->GenS.ObjectPlane : I, in r200_validate_texgen()1197 if (needtgenable & (S_BIT | T_BIT)) { in r200_validate_texgen()1211 (texUnit->TexGenEnabled & S_BIT) ? texUnit->GenS.EyePlane : I, in r200_validate_texgen()[all …]
365 if (texUnit->TexGenEnabled & S_BIT) { in texgen()534 if (texUnit->TexGenEnabled == (S_BIT|T_BIT|R_BIT)) { in validate_texgen_stage()542 else if (texUnit->TexGenEnabled == (S_BIT|T_BIT) && in validate_texgen_stage()
815 if ((texUnit->TexGenEnabled & (S_BIT|T_BIT|R_BIT|Q_BIT)) == 0) { in radeon_validate_texgen()828 else if ( (texUnit->TexGenEnabled & S_BIT) && in radeon_validate_texgen()
767 GLbitfield coordBit = S_BIT << (cap - GL_TEXTURE_GEN_S); in _mesa_set_enable()1520 GLbitfield coordBit = S_BIT << (cap - GL_TEXTURE_GEN_S); in _mesa_IsEnabled()
285 if (texUnit->TexGenEnabled & S_BIT) { in compute_texgen()
739 _mesa_set_enable(ctx, GL_TEXTURE_GEN_S, !!(genEnabled & S_BIT)); in pop_enable_group()800 _mesa_set_enable(ctx, GL_TEXTURE_GEN_S, !!(unit->TexGenEnabled & S_BIT)); in pop_texture_group()
616 if (texUnit->TexGenEnabled & S_BIT) { in update_texgen()
1189 #define S_BIT 1 macro1193 #define STR_BITS (S_BIT | T_BIT | R_BIT)