| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-xray/ |
| D | xray-color-helper.cpp | 85 double Scaled[3] = {std::get<0>(Color) / 255.0, std::get<1>(Color) / 255.0, in convertToHSV() local
90 if (Scaled[i] < Scaled[Min]) in convertToHSV()
92 if (Scaled[i] > Scaled[Max]) in convertToHSV()
96 double C = Scaled[Max] - Scaled[Min]; in convertToHSV()
99 (C == 0) ? 0 : (Scaled[(Max + 1) % 3] - Scaled[(Max + 2) % 3]) / C; in convertToHSV()
104 double V = Scaled[Max]; in convertToHSV()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Transforms/ |
| D | Instrumentation.h | 205 uint64_t Scaled = Count / Scale; in scaleBranchCount() local
206 assert(Scaled <= std::numeric_limits<uint32_t>::max() && "overflow 32-bits"); in scaleBranchCount()
207 return Scaled; in scaleBranchCount()
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| /external/llvm/include/llvm/Transforms/ |
| D | Instrumentation.h | 183 uint64_t Scaled = Count / Scale; in scaleBranchCount() local
184 assert(Scaled <= UINT32_MAX && "overflow 32-bits"); in scaleBranchCount()
185 return Scaled; in scaleBranchCount()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | BlockFrequencyInfoImpl.cpp | 488 Scaled64 Scaled = BFI.Freqs[Index].Scaled * ScalingFactor; in convertFloatingToInteger() local
489 BFI.Freqs[Index].Integer = std::max(UINT64_C(1), Scaled.toInt<uint64_t>()); in convertFloatingToInteger()
491 << BFI.Freqs[Index].Scaled << ", scaled = " << Scaled in convertFloatingToInteger()
514 : BFI.Freqs[N.Index].Scaled; in unwrapLoop()
525 Freqs[Index].Scaled = Working[Index].Mass.toScaled(); in unwrapLoops()
538 Min = std::min(Min, Freqs[Index].Scaled); in finalizeMetrics()
539 Max = std::max(Max, Freqs[Index].Scaled); in finalizeMetrics()
591 return Freqs[Node.Index].Scaled; in getFloatingBlockFreq()
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| /external/llvm/lib/Analysis/ |
| D | BlockFrequencyInfoImpl.cpp | 462 Scaled64 Scaled = BFI.Freqs[Index].Scaled * ScalingFactor; in convertFloatingToInteger() local
463 BFI.Freqs[Index].Integer = std::max(UINT64_C(1), Scaled.toInt<uint64_t>()); in convertFloatingToInteger()
465 << BFI.Freqs[Index].Scaled << ", scaled = " << Scaled in convertFloatingToInteger()
488 : BFI.Freqs[N.Index].Scaled; in unwrapLoop()
499 Freqs[Index].Scaled = Working[Index].Mass.toScaled(); in unwrapLoops()
512 Min = std::min(Min, Freqs[Index].Scaled); in finalizeMetrics()
513 Max = std::max(Max, Freqs[Index].Scaled); in finalizeMetrics()
552 return Freqs[Node.Index].Scaled; in getFloatingBlockFreq()
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| D | ScalarEvolutionExpander.cpp | 441 Value *Scaled = ScaledOps.empty() ? in expandAddToGEP() local
444 GepIndices.push_back(Scaled); in expandAddToGEP()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleV6.td | 109 // Scaled register offset, issues over 2 cycles
122 // Scaled register offset with update, issues over 2 cycles
162 // Scaled register offset, issues over 2 cycles
175 // Scaled register offset with update, issues over 2 cycles
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| D | ARMScheduleA8.td | 124 // Scaled register offset, issues over 2 cycles
145 // Scaled register offset with update, issues over 2 cycles
203 // Scaled register offset, issues over 2 cycles
223 // Scaled register offset with update, issues over 2 cycles
|
| D | ARMScheduleA9.td | 227 // Scaled register offset
268 // Scaled register offset with update
367 // Scaled register offset
404 // Scaled register offset with update
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleV6.td | 109 // Scaled register offset, issues over 2 cycles
122 // Scaled register offset with update, issues over 2 cycles
162 // Scaled register offset, issues over 2 cycles
175 // Scaled register offset with update, issues over 2 cycles
|
| D | ARMScheduleA8.td | 124 // Scaled register offset, issues over 2 cycles
145 // Scaled register offset with update, issues over 2 cycles
203 // Scaled register offset, issues over 2 cycles
223 // Scaled register offset with update, issues over 2 cycles
|
| D | ARMScheduleA9.td | 227 // Scaled register offset
268 // Scaled register offset with update
367 // Scaled register offset
404 // Scaled register offset with update
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMScheduleV6.td | 109 // Scaled register offset, issues over 2 cycles
122 // Scaled register offset with update, issues over 2 cycles
162 // Scaled register offset, issues over 2 cycles
175 // Scaled register offset with update, issues over 2 cycles
|
| D | ARMScheduleA8.td | 124 // Scaled register offset, issues over 2 cycles
145 // Scaled register offset with update, issues over 2 cycles
201 // Scaled register offset, issues over 2 cycles
221 // Scaled register offset with update, issues over 2 cycles
|
| D | ARMScheduleA9.td | 223 // Scaled register offset
264 // Scaled register offset with update
359 // Scaled register offset
396 // Scaled register offset with update
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineTraceMetrics.h | 380 unsigned getCycles(unsigned Scaled) { in getCycles() argument
382 return (Scaled + Factor - 1) / Factor; in getCycles()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineTraceMetrics.h | 416 unsigned getCycles(unsigned Scaled) { in getCycles() argument
418 return (Scaled + Factor - 1) / Factor; in getCycles()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | SpillPlacement.cpp | 258 uint64_t Scaled = (Freq >> 13) + bool(Freq & (1 << 12)); in setThreshold() local
259 Threshold = std::max(UINT64_C(1), Scaled); in setThreshold()
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| /external/llvm/lib/CodeGen/ |
| D | SpillPlacement.cpp | 250 uint64_t Scaled = (Freq >> 13) + bool(Freq & (1 << 12)); in setThreshold() local
251 Threshold = std::max(UINT64_C(1), Scaled); in setThreshold()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | fast-isel-addressing-modes.ll | 319 ; Load Scaled Register Offset
340 ; Load Base Register + Scaled Register Offset
483 ; Load Base Register + Scaled Register Offset + Sign/Zero extension
565 ; Load Scaled Register Offset + Immediate Offset + Sign/Zero extension
578 ; Load Base Register + Scaled Register Offset + Immediate Offset + Sign/Zero extension
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| /external/llvm/test/CodeGen/AArch64/ |
| D | fast-isel-addressing-modes.ll | 319 ; Load Scaled Register Offset
340 ; Load Base Register + Scaled Register Offset
483 ; Load Base Register + Scaled Register Offset + Sign/Zero extension
565 ; Load Scaled Register Offset + Immediate Offset + Sign/Zero extension
578 ; Load Base Register + Scaled Register Offset + Immediate Offset + Sign/Zero extension
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| /external/clang/lib/CodeGen/ |
| D | CodeGenPGO.cpp | 842 uint64_t Scaled = Weight / Scale + 1; in scaleBranchWeight() local
843 assert(Scaled <= UINT32_MAX && "overflow 32-bits"); in scaleBranchWeight()
844 return Scaled; in scaleBranchWeight()
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| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| D | ScalarEvolutionExpander.cpp | 424 Value *Scaled = ScaledOps.empty() ? in expandAddToGEP() local
427 GepIndices.push_back(Scaled); in expandAddToGEP()
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| /external/mesa3d/src/gallium/state_trackers/wgl/ |
| D | stw_icd.h | 351 void (GLAPIENTRY * Scaled)(GLdouble, GLdouble, GLdouble);
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| /external/llvm/include/llvm/Analysis/ |
| D | BlockFrequencyInfoImpl.h | 192 Scaled64 Scaled;
|