/external/v8/src/wasm/baseline/arm64/ |
D | liftoff-assembler-arm64.h | 646 Scvtf(fp_cmp, dst.gp().W()); // i32 -> f64. in emit_type_conversion() 712 Scvtf(dst.fp().S(), src.gp().W()); in emit_type_conversion() 718 Scvtf(dst.fp().S(), src.gp().X()); in emit_type_conversion() 730 Scvtf(dst.fp().D(), src.gp().W()); in emit_type_conversion() 736 Scvtf(dst.fp().D(), src.gp().X()); in emit_type_conversion()
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/external/v8/src/compiler/arm64/ |
D | code-generator-arm64.cc | 1462 __ Scvtf(i.OutputFloat32Register(), i.InputRegister32(0)); in AssembleArchInstruction() local 1465 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); in AssembleArchInstruction() local 1468 __ Scvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0)); in AssembleArchInstruction() local 1471 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister64(0)); in AssembleArchInstruction() local 1736 SIMD_UNOP_CASE(kArm64F32x4SConvertI32x4, Scvtf, 4S); in AssembleArchInstruction()
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 6862 COMPARE_MACRO(Scvtf(v5.V2S(), v3.V2S()), in TEST() 6865 COMPARE_MACRO(Scvtf(v6.V4S(), v4.V4S()), in TEST() 6868 COMPARE_MACRO(Scvtf(v7.V2D(), v5.V2D()), in TEST() 6871 COMPARE_MACRO(Scvtf(s8, s6), "scvtf s8, s6"); in TEST() 6872 COMPARE_MACRO(Scvtf(d8, d6), "scvtf d8, d6"); in TEST() 6941 COMPARE_2REGMISC_FP16(Scvtf, "scvtf"); in TEST() 7355 COMPARE_MACRO(Scvtf(v5.V4H(), v3.V4H(), 11), "scvtf v5.4h, v3.4h, #11"); in TEST() 7356 COMPARE_MACRO(Scvtf(v6.V8H(), v4.V8H(), 12), "scvtf v6.8h, v4.8h, #12"); in TEST() 7357 COMPARE_MACRO(Scvtf(v5.V2S(), v3.V2S(), 11), "scvtf v5.2s, v3.2s, #11"); in TEST() 7358 COMPARE_MACRO(Scvtf(v6.V4S(), v4.V4S(), 12), "scvtf v6.4s, v4.4s, #12"); in TEST() [all …]
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D | test-assembler-aarch64.cc | 14473 __ Scvtf(d0, x10); in TestUScvtfHelper() local 14475 __ Scvtf(d2, w11); in TestUScvtfHelper() local 14484 __ Scvtf(d0, x10, fbits); in TestUScvtfHelper() local 14486 __ Scvtf(d2, w11, fbits); in TestUScvtfHelper() local 14497 __ Scvtf(d0, x10, fbits); in TestUScvtfHelper() local 14628 __ Scvtf(s0, x10); in TestUScvtf32Helper() local 14630 __ Scvtf(s2, w11); in TestUScvtf32Helper() local 14639 __ Scvtf(s0, x10, fbits); in TestUScvtf32Helper() local 14641 __ Scvtf(s2, w11, fbits); in TestUScvtf32Helper() local 14652 __ Scvtf(s0, x10, fbits); in TestUScvtf32Helper() local
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D | test-simulator-aarch64.cc | 5001 __ Scvtf(temp, input_2); in GenerateSum() local
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 982 inline void Scvtf(const VRegister& fd, const Register& rn, 984 void Scvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
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D | macro-assembler-arm64-inl.h | 884 void TurboAssembler::Scvtf(const VRegister& fd, const Register& rn, in Scvtf() function
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D | macro-assembler-arm64.cc | 2030 Scvtf(scratch_d, as_int); in TryRepresentDoubleAsInt()
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.h | 2166 void Scvtf(const VRegister& vd, const Register& rn, int fbits = 0) { 3102 void Scvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
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/external/v8/src/builtins/arm64/ |
D | builtins-arm64.cc | 3088 __ Scvtf(exponent_double, exponent_integer); in Generate_MathPowInternal() local
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