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Searched refs:SecondLdSt (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h108 bool shouldClusterMemOps(MachineInstr &FirstLdSt, MachineInstr &SecondLdSt,
DAArch64InstrInfo.cpp1762 MachineInstr &SecondLdSt, in shouldClusterMemOps() argument
1770 unsigned SecondOpc = SecondLdSt.getOpcode(); in shouldClusterMemOps()
1777 !isCandidateToMergeOrPair(SecondLdSt)) in shouldClusterMemOps()
1785 int64_t Offset2 = SecondLdSt.getOperand(2).getImm(); in shouldClusterMemOps()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp300 MachineInstr &SecondLdSt, in shouldClusterMemOps() argument
305 if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
307 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdst); in shouldClusterMemOps()
310 if (isSMRD(FirstLdSt) && isSMRD(SecondLdSt)) { in shouldClusterMemOps()
312 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::sdst); in shouldClusterMemOps()
315 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
316 (isMTBUF(FirstLdSt) && isMTBUF(SecondLdSt))) { in shouldClusterMemOps()
318 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdata); in shouldClusterMemOps()
DSIInstrInfo.h117 bool shouldClusterMemOps(MachineInstr &FirstLdSt, MachineInstr &SecondLdSt,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h132 MachineInstr &SecondLdSt, unsigned BaseReg2,
DAArch64InstrInfo.cpp2361 MachineInstr &SecondLdSt, in shouldClusterMemOps() argument
2371 if (!isPairableLdStInst(FirstLdSt) || !isPairableLdStInst(SecondLdSt)) in shouldClusterMemOps()
2376 unsigned SecondOpc = SecondLdSt.getOpcode(); in shouldClusterMemOps()
2383 !isCandidateToMergeOrPair(SecondLdSt)) in shouldClusterMemOps()
2391 int64_t Offset2 = SecondLdSt.getOperand(2).getImm(); in shouldClusterMemOps()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp406 MachineInstr &SecondLdSt, in shouldClusterMemOps() argument
409 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseReg1, SecondLdSt, BaseReg2)) in shouldClusterMemOps()
415 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
416 (isMTBUF(FirstLdSt) && isMTBUF(SecondLdSt)) || in shouldClusterMemOps()
417 (isFLAT(FirstLdSt) && isFLAT(SecondLdSt))) { in shouldClusterMemOps()
425 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdata); in shouldClusterMemOps()
427 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdst); in shouldClusterMemOps()
428 } else if (isSMRD(FirstLdSt) && isSMRD(SecondLdSt)) { in shouldClusterMemOps()
430 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::sdst); in shouldClusterMemOps()
431 } else if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
[all …]
DSIInstrInfo.h168 MachineInstr &SecondLdSt, unsigned BaseReg2,
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h1046 MachineInstr &SecondLdSt, in shouldClusterMemOps() argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetInstrInfo.h1150 MachineInstr &SecondLdSt, unsigned BaseReg2, in shouldClusterMemOps() argument