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Searched refs:SegReg (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp163 const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printMemReference() local
166 if (SegReg.getReg()) { in printMemReference()
211 const MCOperand &SegReg = MI->getOperand(Op+1); in printSrcIdx() local
214 if (SegReg.getReg()) { in printSrcIdx()
234 const MCOperand &SegReg = MI->getOperand(Op+1); in printMemOffset() local
237 if (SegReg.getReg()) { in printMemOffset()
DX86ATTInstPrinter.cpp200 const MCOperand &SegReg = MI->getOperand(Op + X86::AddrSegmentReg); in printMemReference() local
205 if (SegReg.getReg()) { in printMemReference()
241 const MCOperand &SegReg = MI->getOperand(Op + 1); in printSrcIdx() local
246 if (SegReg.getReg()) { in printSrcIdx()
272 const MCOperand &SegReg = MI->getOperand(Op + 1); in printMemOffset() local
277 if (SegReg.getReg()) { in printMemOffset()
/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/
DX86AsmParser.cpp47 X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
133 unsigned SegReg; member
177 return Mem.SegReg; in getMemSegReg()
342 Res->Mem.SegReg = 0; in CreateMem()
351 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp, in CreateMem()
356 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!"); in CreateMem()
362 Res->Mem.SegReg = SegReg; in CreateMem()
377 (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::DS) && in isSrcOp()
386 return Op.isMem() && Op.Mem.SegReg == X86::ES && in isDstOp()
527 X86Operand *X86ATTAsmParser::ParseMemOperand(unsigned SegReg, SMLoc MemStart) { in ParseMemOperand() argument
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/
DX86Operand.h59 unsigned SegReg; member
143 if (Mem.SegReg) in print()
144 OS << ",SegReg=" << X86IntelInstPrinter::getRegisterName(Mem.SegReg); in print()
180 return Mem.SegReg; in getMemSegReg()
571 Res->Mem.SegReg = 0;
587 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
593 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
599 Res->Mem.SegReg = SegReg;
DX86AsmParser.cpp838 std::unique_ptr<X86Operand> ParseMemOperand(unsigned SegReg, SMLoc MemStart);
842 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
1313 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1342 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1380 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, BaseReg, in CreateMemForInlineAsm()
2091 std::unique_ptr<X86Operand> X86AsmParser::ParseMemOperand(unsigned SegReg, in ParseMemOperand() argument
2111 if (SegReg == 0) in ParseMemOperand()
2113 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, 0, 0, 1, in ParseMemOperand()
2142 if (SegReg == 0) in ParseMemOperand()
2145 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, 0, 0, 1, in ParseMemOperand()
[all …]
/external/llvm/lib/Target/X86/AsmParser/
DX86Operand.h53 unsigned SegReg; member
113 return Mem.SegReg; in getMemSegReg()
501 Res->Mem.SegReg = 0;
516 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
522 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
528 Res->Mem.SegReg = SegReg;
DX86AsmParser.cpp700 ParseIntelSegmentOverride(unsigned SegReg, SMLoc Start, unsigned Size);
705 std::unique_ptr<X86Operand> ParseIntelBracExpression(unsigned SegReg,
713 std::unique_ptr<X86Operand> ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
716 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
1112 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1160 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1198 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, BaseReg, in CreateMemForInlineAsm()
1388 X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start, in ParseIntelBracExpression() argument
1445 if (!SegReg) in ParseIntelBracExpression()
1447 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, 0, 0, 1, in ParseIntelBracExpression()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/
DX86ATTInstPrinter.cpp113 const MCOperand &SegReg = MI->getOperand(Op+4); in printMemReference() local
116 if (SegReg.getReg()) { in printMemReference()
DX86IntelInstPrinter.cpp101 const MCOperand &SegReg = MI->getOperand(Op+4); in printMemReference() local
104 if (SegReg.getReg()) { in printMemReference()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp368 unsigned SegReg = SrcRegs[i]; in narrowScalar() local
371 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalar()
372 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset); in narrowScalar()
375 DstRegs.push_back(SegReg); in narrowScalar()
426 unsigned SegReg = OpReg; in narrowScalar() local
429 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalar()
430 MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset); in narrowScalar()
434 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalar()
/external/capstone/arch/X86/
DX86IntelInstPrinter.c295 MCOperand *SegReg; in printSrcIdx() local
308 SegReg = MCInst_getOperand(MI, Op+1); in printSrcIdx()
309 reg = MCOperand_getReg(SegReg); in printSrcIdx()
413 MCOperand *SegReg = MCInst_getOperand(MI, Op + 1); in printMemOffset() local
427 reg = MCOperand_getReg(SegReg); in printMemOffset()
773 MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); in printMemReference() local
787 reg = MCOperand_getReg(SegReg); in printMemReference()
DX86ATTInstPrinter.c269 MCOperand *SegReg; in printSrcIdx() local
282 SegReg = MCInst_getOperand(MI, Op+1); in printSrcIdx()
283 reg = MCOperand_getReg(SegReg); in printSrcIdx()
384 MCOperand *SegReg = MCInst_getOperand(MI, Op+1); in printMemOffset() local
398 reg = MCOperand_getReg(SegReg); in printMemOffset()
677 MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); in printMemReference() local
692 segreg = MCOperand_getReg(SegReg); in printMemReference()
/external/llvm/lib/Target/X86/
DX86AsmPrinter.cpp300 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printIntelMemReference() local
303 if (SegReg.getReg()) { in printIntelMemReference()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86AsmPrinter.cpp328 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printIntelMemReference() local
331 if (SegReg.getReg()) { in printIntelMemReference()