Searched refs:SelectOpcode (Results 1 – 3 of 3) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 2380 auto SelectOpcode = [&](unsigned Opc64, unsigned Opc32, unsigned Opc16, in foldLoadStoreIntoMemOperand() local
2402 ? SelectOpcode(X86::INC64m, X86::INC32m, X86::INC16m, X86::INC8m) in foldLoadStoreIntoMemOperand()
2403 : SelectOpcode(X86::DEC64m, X86::DEC32m, X86::DEC16m, X86::DEC8m); in foldLoadStoreIntoMemOperand()
2416 auto SelectRegOpcode = [SelectOpcode](unsigned Opc) { in foldLoadStoreIntoMemOperand()
2419 return SelectOpcode(X86::ADD64mr, X86::ADD32mr, X86::ADD16mr, in foldLoadStoreIntoMemOperand()
2422 return SelectOpcode(X86::ADC64mr, X86::ADC32mr, X86::ADC16mr, in foldLoadStoreIntoMemOperand()
2425 return SelectOpcode(X86::SUB64mr, X86::SUB32mr, X86::SUB16mr, in foldLoadStoreIntoMemOperand()
2428 return SelectOpcode(X86::SBB64mr, X86::SBB32mr, X86::SBB16mr, in foldLoadStoreIntoMemOperand()
2431 return SelectOpcode(X86::AND64mr, X86::AND32mr, X86::AND16mr, in foldLoadStoreIntoMemOperand()
2434 return SelectOpcode(X86::OR64mr, X86::OR32mr, X86::OR16mr, X86::OR8mr); in foldLoadStoreIntoMemOperand()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5222 auto SelectOpcode = [&](unsigned NeededShift, unsigned MulOrDivVariant) { in extractShiftForRotate() local
5231 if ((OppShift.getOpcode() != ISD::SRL || !SelectOpcode(ISD::SHL, ISD::MUL)) && in extractShiftForRotate()
5232 (OppShift.getOpcode() != ISD::SHL || !SelectOpcode(ISD::SRL, ISD::UDIV))) in extractShiftForRotate()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 29892 auto SelectOpcode = VT.isVector() ? ISD::VSELECT : ISD::SELECT; in combineFMinNumFMaxNum() local
29893 return DAG.getNode(SelectOpcode, DL, VT, IsOp0Nan, Op1, MinOrMax); in combineFMinNumFMaxNum()
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