/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 1264 EVT ShTy = N->getOperand(1).getValueType(); in ExpandShiftByConstant() local 1272 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); in ExpandShiftByConstant() 1286 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)); in ExpandShiftByConstant() 1289 DAG.getConstant(Amt, ShTy)), in ExpandShiftByConstant() 1291 DAG.getConstant(NVTBits-Amt, ShTy))); in ExpandShiftByConstant() 1302 NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy)); in ExpandShiftByConstant() 1310 DAG.getConstant(Amt, ShTy)), in ExpandShiftByConstant() 1312 DAG.getConstant(NVTBits-Amt, ShTy))); in ExpandShiftByConstant() 1313 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy)); in ExpandShiftByConstant() 1321 DAG.getConstant(NVTBits-1, ShTy)); in ExpandShiftByConstant() [all …]
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D | TargetLowering.cpp | 1480 EVT ShTy = getShiftAmountTy(InnerVT); in SimplifyDemandedBits() local 1481 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits() 1482 ShTy = InnerVT; in SimplifyDemandedBits() 1485 TLO.DAG.getConstant(ShAmt, ShTy)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 1446 MVT ShTy = TLI.getShiftAmountTy(LHSTy); in getShiftAmountOperand() local 1447 if (OpTy == ShTy || OpTy.isVector()) return Op; in getShiftAmountOperand() 1449 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; in getShiftAmountOperand() 1450 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); in getShiftAmountOperand()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 1440 EVT ShTy = N->getOperand(1).getValueType(); in ExpandShiftByConstant() local 1448 NVT, InL, DAG.getConstant(Amt - NVTBits, DL, ShTy)); in ExpandShiftByConstant() 1453 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, DL, ShTy)); in ExpandShiftByConstant() 1456 DAG.getConstant(Amt, DL, ShTy)), in ExpandShiftByConstant() 1458 DAG.getConstant(-Amt + NVTBits, DL, ShTy))); in ExpandShiftByConstant() 1468 NVT, InH, DAG.getConstant(Amt - NVTBits, DL, ShTy)); in ExpandShiftByConstant() 1476 DAG.getConstant(Amt, DL, ShTy)), in ExpandShiftByConstant() 1478 DAG.getConstant(-Amt + NVTBits, DL, ShTy))); in ExpandShiftByConstant() 1479 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, DL, ShTy)); in ExpandShiftByConstant() 1487 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant() [all …]
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D | TargetLowering.cpp | 702 EVT ShTy = getShiftAmountTy(InnerVT, DL); in SimplifyDemandedBits() local 703 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits() 704 ShTy = InnerVT; in SimplifyDemandedBits() 707 TLO.DAG.getConstant(ShAmt, dl, ShTy)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 1810 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout()); in getShiftAmountOperand() local 1811 if (OpTy == ShTy || OpTy.isVector()) return Op; in getShiftAmountOperand() 1813 return getZExtOrTrunc(Op, SDLoc(Op), ShTy); in getShiftAmountOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 1515 EVT ShTy = N->getOperand(1).getValueType(); in ExpandShiftByConstant() local 1523 NVT, InL, DAG.getConstant(Amt - NVTBits, DL, ShTy)); in ExpandShiftByConstant() 1528 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, DL, ShTy)); in ExpandShiftByConstant() 1531 DAG.getConstant(Amt, DL, ShTy)), in ExpandShiftByConstant() 1533 DAG.getConstant(-Amt + NVTBits, DL, ShTy))); in ExpandShiftByConstant() 1543 NVT, InH, DAG.getConstant(Amt - NVTBits, DL, ShTy)); in ExpandShiftByConstant() 1551 DAG.getConstant(Amt, DL, ShTy)), in ExpandShiftByConstant() 1553 DAG.getConstant(-Amt + NVTBits, DL, ShTy))); in ExpandShiftByConstant() 1554 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, DL, ShTy)); in ExpandShiftByConstant() 1562 DAG.getConstant(NVTBits - 1, DL, ShTy)); in ExpandShiftByConstant() [all …]
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D | TargetLowering.cpp | 829 EVT ShTy = getShiftAmountTy(InnerVT, DL); in SimplifyDemandedBits() local 830 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits() 831 ShTy = InnerVT; in SimplifyDemandedBits() 834 TLO.DAG.getConstant(ShAmt, dl, ShTy)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 1882 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout()); in getShiftAmountOperand() local 1883 if (OpTy == ShTy || OpTy.isVector()) return Op; in getShiftAmountOperand() 1885 return getZExtOrTrunc(Op, SDLoc(Op), ShTy); in getShiftAmountOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 1505 static ARMOperand *CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, in CreateShiftedRegister() argument 1511 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister() 1520 static ARMOperand *CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, in CreateShiftedImmediate() argument 1525 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 2965 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedRegister() argument 2969 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister() 2979 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedImmediate() argument 2982 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 2649 CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedRegister() argument 2653 Op->RegShiftedReg.ShiftTy = ShTy; in CreateShiftedRegister() 2663 CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, in CreateShiftedImmediate() argument 2666 Op->RegShiftedImm.ShiftTy = ShTy; in CreateShiftedImmediate()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 17857 MVT ShTy = getScalarShiftAmountTy(DAG.getDataLayout(), VT); in EmitTest() local 17858 SDValue ShAmt = DAG.getConstant(TrailingZeros, dl, ShTy); in EmitTest() 17869 MVT ShTy = getScalarShiftAmountTy(DAG.getDataLayout(), VT); in EmitTest() local 17870 SDValue ShAmt = DAG.getConstant(LeadingZeros, dl, ShTy); in EmitTest()
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