Searched refs:Shift1 (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 2378 SDValue Shift1 = DAG.getConstant(8, MVT::i32); in LowerCTPOP() local
2396 Tmp1, Shift1), in LowerCTPOP()
2411 SDValue Shift1 = DAG.getConstant(16, MVT::i32); in LowerCTPOP() local
2428 Shift1); in LowerCTPOP()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 4827 def Shift1 {
4833 dag Bit = (OR (AND Shift1.Right, MaskValues.Lo1),
4834 (AND Shift1.Left, MaskValues.Hi1));
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 23499 SDValue Shift1 = DAG.getNode(Op->getOpcode(), dl, VT, R, Splat1); in LowerShift() local
23503 return DAG.getVectorShuffle(VT, dl, Shift1, Shift2, ShuffleMask); in LowerShift()
33772 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in combineMulSpecial() local
33776 return DAG.getNode(ISD::ADD, DL, VT, Shift1, Shift2); in combineMulSpecial()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20166 SDValue Shift1 = DAG.getNode(Op->getOpcode(), dl, VT, R, Splat1); in LowerShift() local
20172 SDValue BitCast1 = DAG.getBitcast(CastVT, Shift1); in LowerShift()
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