Searched refs:SpillAlignment (Results 1 – 14 of 14) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | InfoByHwMode.cpp | 121 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo() 125 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <() 126 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <() 131 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 && in isSubClassOf() 137 << ",A=" << SpillAlignment << ']'; in writeToStream() 170 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan() 171 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
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D | InfoByHwMode.h | 144 unsigned SpillAlignment; member 150 return std::tie(RegSize, SpillSize, SpillAlignment) == 151 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
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D | RegisterInfoEmitter.cpp | 1248 << RI.SpillAlignment; in runTargetDesc() 1597 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
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D | CodeGenRegisters.cpp | 791 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | CodeGenRegisters.h | 112 unsigned SpillAlignment; variable 194 unsigned SpillAlignment; member 199 SpillAlignment(O.SpillAlignment) {} in Key() 202 : Members(M), SpillSize(S), SpillAlignment(A) {} in Members() 207 SpillAlignment(RC.SpillAlignment) {} in Key()
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D | CodeGenRegisters.cpp | 330 SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass() 345 SpillAlignment(Props.SpillAlignment), in CodeGenRegisterClass() 381 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment; in operator <<() 398 return SpillAlignment < B.SpillAlignment; in operator <() 412 return A->SpillAlignment && B->SpillAlignment % A->SpillAlignment == 0 && in testSubClass() 445 if (A->SpillAlignment < B->SpillAlignment) in TopoOrderRC() 447 if (A->SpillAlignment > B->SpillAlignment) in TopoOrderRC() 783 CodeGenRegisterClass::Key K(&I->second, RC.SpillSize, RC.SpillAlignment); in computeInferredRegisterClasses()
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D | RegisterInfoEmitter.cpp | 377 << RC.SpillAlignment/8 << ", " in runMCDesc()
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/external/llvm/utils/TableGen/ |
D | CodeGenRegisters.h | 304 unsigned SpillAlignment; variable 408 unsigned SpillAlignment; member 411 : Members(M), SpillSize(S), SpillAlignment(A) {} in Members() 416 SpillAlignment(RC.SpillAlignment) {} in Key()
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D | CodeGenRegisters.cpp | 709 SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass() 730 SpillAlignment(Props.SpillAlignment), in CodeGenRegisterClass() 771 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment; in operator <<() 783 return std::tie(*Members, SpillSize, SpillAlignment) < in operator <() 784 std::tie(*B.Members, B.SpillSize, B.SpillAlignment); in operator <() 798 return A->SpillAlignment && B->SpillAlignment % A->SpillAlignment == 0 && in testSubClass() 825 if (A->SpillAlignment < B->SpillAlignment) in TopoOrderRC() 827 if (A->SpillAlignment > B->SpillAlignment) in TopoOrderRC() 1052 CodeGenRegisterClass::Key K(Members, RC->SpillSize, RC->SpillAlignment); in getOrCreateSubClass() 1894 RC2->SpillAlignment > RC1->SpillAlignment)) in inferCommonSubClass()
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D | RegisterInfoEmitter.cpp | 1033 assert((RC.SpillAlignment/8) <= 0xffff && "SpillAlignment too large."); in runMCDesc() 1041 << RC.SpillAlignment/8 << ", " in runMCDesc()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetRegisterInfo.h | 225 unsigned RegSize, SpillSize, SpillAlignment; member 327 return getRegClassInfo(RC).SpillAlignment / 8; in getSpillAlignment()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
D | Target.td | 64 int SpillAlignment = SA; // Spill slot alignment in bits.
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 355 int SpillAlignment = 0;
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/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 355 int SpillAlignment = 0;
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