Searched refs:Src0Idx (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | SIShrinkInstructions.cpp | 138 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in foldImmediates() local 139 MachineOperand &Src0 = MI.getOperand(Src0Idx); in foldImmediates() 144 TII->isLiteralConstant(Src0, TII->getOpSize(MI, Src0Idx))) in foldImmediates()
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D | SIInstrInfo.cpp | 952 int Src0Idx = in commuteInstructionImpl() local 954 MachineOperand &Src0 = MI.getOperand(Src0Idx); in commuteInstructionImpl() 961 if ((OpIdx0 != static_cast<unsigned>(Src0Idx) || in commuteInstructionImpl() 964 OpIdx1 != static_cast<unsigned>(Src0Idx))) in commuteInstructionImpl() 1037 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); in findCommutedOpIndices() local 1038 if (Src0Idx == -1) in findCommutedOpIndices() 1044 if (!MI.getOperand(Src0Idx).isReg()) in findCommutedOpIndices() 1066 return fixCommutedOpIndices(SrcOpIdx0, SrcOpIdx1, Src0Idx, Src1Idx); in findCommutedOpIndices() 1652 int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); in verifyInstruction() local 1726 const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx }; in verifyInstruction() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 1371 unsigned Src0Idx, in commuteInstructionImpl() argument 1381 static_cast<int>(Src0Idx) && in commuteInstructionImpl() 1386 MachineOperand &Src0 = MI.getOperand(Src0Idx); in commuteInstructionImpl() 1394 = TargetInstrInfo::commuteInstructionImpl(MI, NewMI, Src0Idx, Src1Idx); in commuteInstructionImpl() 1428 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); in findCommutedOpIndices() local 1429 if (Src0Idx == -1) in findCommutedOpIndices() 1436 return fixCommutedOpIndices(SrcOpIdx0, SrcOpIdx1, Src0Idx, Src1Idx); in findCommutedOpIndices() 2236 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertToThreeAddress() local 2238 const MachineOperand *Src0 = &MI.getOperand(Src0Idx); in convertToThreeAddress() 2242 if (Src0->isImm() && !isInlineConstant(MI, Src0Idx, *Src0)) in convertToThreeAddress() [all …]
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D | SIFoldOperands.cpp | 546 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); in tryConstantFoldOp() local 547 MachineOperand *Src0 = getImmOrMaterializedImm(MRI, MI->getOperand(Src0Idx)); in tryConstantFoldOp() 566 MI->getOperand(Src0Idx).ChangeToImmediate(NewImm); in tryConstantFoldOp() 577 std::swap(Src0Idx, Src1Idx); in tryConstantFoldOp() 603 MI->RemoveOperand(Src0Idx); in tryConstantFoldOp()
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D | SIShrinkInstructions.cpp | 127 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in foldImmediates() local 130 MachineOperand &Src0 = MI.getOperand(Src0Idx); in foldImmediates()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
D | AMDGPUAsmParser.cpp | 2294 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); in validateConstantBusLimitations() local 2298 const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx }; in validateConstantBusLimitations() 2339 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); in validateEarlyClobberLimitations() local 2348 const int SrcIndices[] = { Src0Idx, Src1Idx, Src2Idx }; in validateEarlyClobberLimitations()
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