/external/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 107 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 110 if (SrcMI && SrcMI->isCopy() && in IsSingleValuePHICycle() 111 !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 112 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 113 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle() 114 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle() 115 if (!SrcMI) in IsSingleValuePHICycle() 118 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 119 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 116 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 119 if (SrcMI && SrcMI->isCopy() && in IsSingleValuePHICycle() 120 !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 121 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 122 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle() 123 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle() 124 if (!SrcMI) in IsSingleValuePHICycle() 127 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 128 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | OptimizePHIs.cpp | 103 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 106 if (SrcMI && SrcMI->isCopy() && in IsSingleValuePHICycle() 107 !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 108 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 109 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle() 110 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle() 111 if (!SrcMI) in IsSingleValuePHICycle() 114 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 115 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 530 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 533 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode() 534 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode() 535 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg())) in simplifyCode() 552 isXForm(SrcMI->getOpcode())); in simplifyCode() 554 LLVM_DEBUG(SrcMI->dump()); in simplifyCode() 558 SrcMI->setDesc(TII->get(Opc)); in simplifyCode() 559 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode() 574 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 577 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode() [all …]
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D | PPCInstrInfo.cpp | 3306 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 3307 if (SrcMI != NULL) in isSignOrZeroExtended() 3308 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended() 3330 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 3331 if (SrcMI != NULL) in isSignOrZeroExtended() 3332 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended() 3359 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 3360 if (SrcMI == NULL || !isSignOrZeroExtended(*SrcMI, SignExt, Depth+1)) in isSignOrZeroExtended()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Thumb2InstrInfo.cpp | 566 Thumb2InstrInfo::scheduleTwoAddrSource(MachineInstr *SrcMI, in scheduleTwoAddrSource() argument 569 if (SrcMI->getOpcode() != ARM::tMOVr || SrcMI->getOperand(1).isKill()) in scheduleTwoAddrSource() 579 unsigned SrcReg = SrcMI->getOperand(1).getReg(); in scheduleTwoAddrSource() 582 MachineBasicBlock::iterator MBBI = SrcMI; in scheduleTwoAddrSource() 600 MBB->remove(SrcMI); in scheduleTwoAddrSource() 601 MBB->insert(++MBBI, SrcMI); in scheduleTwoAddrSource()
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D | Thumb2InstrInfo.h | 60 void scheduleTwoAddrSource(MachineInstr *SrcMI, MachineInstr *UseMI,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | R600ControlFlowFinalizer.cpp | 299 unsigned DstMI, SrcMI; in isCompatibleWithClause() local 318 SrcMI = Reg; in isCompatibleWithClause() 320 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 325 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ControlFlowFinalizer.cpp | 283 unsigned DstMI, SrcMI; in isCompatibleWithClause() local 302 SrcMI = Reg; in isCompatibleWithClause() 304 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 309 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetInstrInfo.h | 189 virtual void scheduleTwoAddrSource(MachineInstr *SrcMI, in scheduleTwoAddrSource() argument
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