| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 99 MachineOperand &SrcMO = MI->getOperand(1); in processBlock() local
102 !IsVSReg(SrcMO.getReg(), MRI)) { in processBlock()
107 IsVRReg(SrcMO.getReg(), MRI) ? &PPC::VSHRCRegClass : in processBlock()
109 assert((IsF8Reg(SrcMO.getReg(), MRI) || in processBlock()
110 IsVRReg(SrcMO.getReg(), MRI) || in processBlock()
111 IsVSSReg(SrcMO.getReg(), MRI) || in processBlock()
112 IsVSFReg(SrcMO.getReg(), MRI)) && in processBlock()
120 .addOperand(SrcMO) in processBlock()
121 .addImm(IsVRReg(SrcMO.getReg(), MRI) ? PPC::sub_128 : in processBlock()
125 SrcMO.setReg(NewVReg); in processBlock()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXCopy.cpp | 97 MachineOperand &SrcMO = MI.getOperand(1); in processBlock() local
100 !IsVSReg(SrcMO.getReg(), MRI)) { in processBlock()
105 assert((IsF8Reg(SrcMO.getReg(), MRI) || in processBlock()
106 IsVSSReg(SrcMO.getReg(), MRI) || in processBlock()
107 IsVSFReg(SrcMO.getReg(), MRI)) && in processBlock()
115 .add(SrcMO) in processBlock()
119 SrcMO.setReg(NewVReg); in processBlock()
121 IsVSReg(SrcMO.getReg(), MRI)) { in processBlock()
135 .add(SrcMO); in processBlock()
138 SrcMO.setReg(NewVReg); in processBlock()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 143 MachineOperand &SrcMO = MI->getOperand(1); in LowerCopy() local
145 bool IdentityCopy = (SrcMO.getReg() == DstMO.getReg()); in LowerCopy()
146 if (IdentityCopy || SrcMO.isUndef()) { in LowerCopy()
151 if (SrcMO.isUndef() || MI->getNumOperands() > 2) { in LowerCopy()
165 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
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| D | TwoAddressInstructionPass.cpp | 1468 MachineOperand &SrcMO = MI->getOperand(SrcIdx); in collectTiedOperands() local
1470 unsigned SrcReg = SrcMO.getReg(); in collectTiedOperands()
1476 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1479 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1485 SrcMO.setReg(DstReg); in collectTiedOperands()
1486 SrcMO.setSubReg(0); in collectTiedOperands()
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| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 147 MachineOperand &SrcMO = MI->getOperand(1); in LowerCopy() local
149 if (SrcMO.getReg() == DstMO.getReg()) { in LowerCopy()
153 if (SrcMO.isUndef() || MI->getNumOperands() > 2) { in LowerCopy()
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
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| D | TwoAddressInstructionPass.cpp | 1413 MachineOperand &SrcMO = MI->getOperand(SrcIdx); in collectTiedOperands() local
1415 unsigned SrcReg = SrcMO.getReg(); in collectTiedOperands()
1421 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1424 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1430 SrcMO.setReg(DstReg); in collectTiedOperands()
1431 SrcMO.setSubReg(0); in collectTiedOperands()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 154 MachineOperand &SrcMO = MI->getOperand(1); in LowerCopy() local
156 if (SrcMO.getReg() == DstMO.getReg()) { in LowerCopy()
160 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) { in LowerCopy()
174 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
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| D | StrongPHIElimination.cpp | 249 MachineOperand &SrcMO = BBI->getOperand(i); in runOnMachineFunction() local
250 unsigned SrcReg = SrcMO.getReg(); in runOnMachineFunction()
658 MachineOperand &SrcMO = PHI->getOperand(i); in InsertCopiesForPHI() local
662 if (SrcMO.isUndef()) in InsertCopiesForPHI()
665 unsigned SrcReg = SrcMO.getReg(); in InsertCopiesForPHI()
697 unsigned SrcSubReg = SrcMO.getSubReg(); in InsertCopiesForPHI()
724 SrcMO.setReg(CopyReg); in InsertCopiesForPHI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 734 MachineOperand &SrcMO = MI.getOperand(1); in widenScalar() local
736 const APInt &Val = SrcMO.getCImm()->getValue().sext(WideTy.getSizeInBits()); in widenScalar()
737 SrcMO.setCImm(ConstantInt::get(Ctx, Val)); in widenScalar()
744 MachineOperand &SrcMO = MI.getOperand(1); in widenScalar() local
746 APFloat Val = SrcMO.getFPImm()->getValueAPF(); in widenScalar()
758 SrcMO.setFPImm(ConstantFP::get(Ctx, Val)); in widenScalar()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 3074 const MachineOperand &SrcMO = MI.getOperand(1); in foldMemoryOperandImpl() local
3076 unsigned SrcReg = SrcMO.getReg(); in foldMemoryOperandImpl()
3085 if (DstMO.getSubReg() == 0 && SrcMO.getSubReg() == 0) { in foldMemoryOperandImpl()
3090 storeRegToStackSlot(MBB, InsertPt, SrcReg, SrcMO.isKill(), FrameIndex, in foldMemoryOperandImpl()
3109 assert(SrcMO.getSubReg() == 0 && in foldMemoryOperandImpl()
3140 storeRegToStackSlot(MBB, InsertPt, WidenedSrcReg, SrcMO.isKill(), in foldMemoryOperandImpl()
3155 if (IsFill && SrcMO.getSubReg() == 0 && DstMO.isUndef()) { in foldMemoryOperandImpl()
|