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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp2210 unsigned SrcSR = 0; in genBitSplit() local
2266 SrcSR = (std::min(Pos, P) == 32) ? Hexagon::isub_hi : Hexagon::isub_lo; in genBitSplit()
2267 if (!validateReg({SrcR,SrcSR}, Hexagon::A4_bitspliti, 1)) in genBitSplit()
2277 if (Op1.getReg() != SrcR || Op1.getSubReg() != SrcSR) in genBitSplit()
2296 .addReg(SrcR, 0, SrcSR) in genBitSplit()