| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 170 unsigned SubReg2 = MI.getOperand(Idx2).getSubReg(); in commuteInstructionImpl() local
191 SubReg0 = SubReg2; in commuteInstructionImpl()
215 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 148 unsigned SubReg2 = MI.getOperand(Idx2).getSubReg(); in commuteInstructionImpl() local
161 SubReg0 = SubReg2; in commuteInstructionImpl()
185 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1493 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::ssub_2, MVT::i32); in QuadSRegs() local
1496 V2, SubReg2, V3, SubReg3 }; in QuadSRegs()
1508 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::dsub_2, MVT::i32); in QuadDRegs() local
1511 V2, SubReg2, V3, SubReg3 }; in QuadDRegs()
1523 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::qsub_2, MVT::i32); in QuadQRegs() local
1526 V2, SubReg2, V3, SubReg3 }; in QuadQRegs()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 352 unsigned SubReg2 = MI.getOperand(2).getSubReg(); in commuteInstructionImpl() local
390 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
395 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1647 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::ssub_2, dl, MVT::i32); in createQuadSRegsNode() local
1650 V2, SubReg2, V3, SubReg3 }; in createQuadSRegsNode()
1662 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::dsub_2, dl, MVT::i32); in createQuadDRegsNode() local
1665 V2, SubReg2, V3, SubReg3 }; in createQuadDRegsNode()
1677 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::qsub_2, dl, MVT::i32); in createQuadQRegsNode() local
1680 V2, SubReg2, V3, SubReg3 }; in createQuadQRegsNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1562 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::ssub_2, dl, MVT::i32); in createQuadSRegsNode() local
1565 V2, SubReg2, V3, SubReg3 }; in createQuadSRegsNode()
1577 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::dsub_2, dl, MVT::i32); in createQuadDRegsNode() local
1580 V2, SubReg2, V3, SubReg3 }; in createQuadDRegsNode()
1592 SDValue SubReg2 = CurDAG->getTargetConstant(ARM::qsub_2, dl, MVT::i32); in createQuadQRegsNode() local
1595 V2, SubReg2, V3, SubReg3 }; in createQuadQRegsNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 388 unsigned SubReg2 = MI.getOperand(2).getSubReg(); in commuteInstructionImpl() local
426 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
431 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 11227 unsigned SubReg1 = AArch64::sube64, SubReg2 = AArch64::subo64; in ReplaceCMP_SWAP_128Results() local
11229 std::swap(SubReg1, SubReg2); in ReplaceCMP_SWAP_128Results()
11232 Results.push_back(DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
|