Searched refs:Sxth (Results 1 – 12 of 12) sorted by relevance
| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1170 __ Sxth(i.OutputRegister32(), i.InputRegister32(0)); in AssembleArchInstruction() local
1176 __ Sxth(i.OutputRegister(), i.InputRegister32(0)); in AssembleArchInstruction() local
1584 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); in AssembleArchInstruction() local
1622 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); in AssembleArchInstruction() local
1648 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); in AssembleArchInstruction() local
1673 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); \ in AssembleArchInstruction()
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| /external/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 118 M(Sxth) \
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| D | test-simulator-cond-rd-operand-rn-t32.cc | 126 M(Sxth) \
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| D | test-simulator-cond-rd-operand-rn-a32.cc | 126 M(Sxth) \
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| D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 118 M(Sxth) \
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| D | test-disasm-a32.cc | 2352 TEST_SHIFT_T32(Sxth, "sxth", 0x0000000a) in TEST()
2386 MUST_FAIL_TEST_BOTH(Sxth(r0, 0x1), "Ill-formed 'sxth' instruction.\n"); in TEST()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIsetDx.td | 347 // SA1_sxth: Sxth.
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 946 void TurboAssembler::Sxth(const Register& rd, const Register& rn) { in Sxth() function
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| D | macro-assembler-arm64.h | 915 inline void Sxth(const Register& rd, const Register& rn);
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 2333 void Sxth(const Register& rd, const Register& rn) { in Sxth() function
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 4726 void Sxth(Condition cond, Register rd, const Operand& operand) { in Sxth() function
4735 void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); } in Sxth() function
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 10312 __ Sxth(x26, w1); in TEST() local
10313 __ Sxth(x27, x2); in TEST() local
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