Home
last modified time | relevance | path

Searched refs:TGSI_OPCODE_CEIL (Results 1 – 21 of 21) sorted by relevance

/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_util.c197 case TGSI_OPCODE_CEIL: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c123 { 1, 1, 0, 0, 0, 0, COMP, "CEIL", TGSI_OPCODE_CEIL },
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h414 #define TGSI_OPCODE_CEIL 83 macro
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h425 #define TGSI_OPCODE_CEIL 83 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c97 case TGSI_OPCODE_CEIL: return RC_OPCODE_CEIL; in translate_opcode()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_tgsi_alu.c721 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem; in si_shader_context_init_alu()
722 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; in si_shader_context_init_alu()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c80 [ TGSI_OPCODE_CEIL ] = { false, false, 0, 1, 1 },
Di915_fpc_translate.c491 case TGSI_OPCODE_CEIL: in i915_translate_instruction()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_lowering.c922 if (opcode == TGSI_OPCODE_CEIL) in transform_flr_ceil()
1395 case TGSI_OPCODE_CEIL: in transform_instr()
Dtgsi_exec.c5441 case TGSI_OPCODE_CEIL: in exec_instruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c767 case TGSI_OPCODE_CEIL: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c2411 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = ceil_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnvfx_vertprog.c559 case TGSI_OPCODE_CEIL: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c540 case TGSI_OPCODE_CEIL: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/auxiliary/nir/
Dtgsi_to_nir.c1541 [TGSI_OPCODE_CEIL] = nir_op_fceil,
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c555 case TGSI_OPCODE_CEIL: in translate_opcode()
5449 case TGSI_OPCODE_CEIL: in emit_vgpu10_instruction()
Dsvga_tgsi_insn.c2802 case TGSI_OPCODE_CEIL: in svga_emit_instruction()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c10333 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2},
10530 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2},
10752 [TGSI_OPCODE_CEIL] = { ALU_OP1_CEIL, tgsi_op2},
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp3266 case TGSI_OPCODE_CEIL: in handleInstruction()
/external/virglrenderer/src/
Dvrend_shader.c3474 case TGSI_OPCODE_CEIL: in iter_instruction()
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp1840 emit_asm(ir, TGSI_OPCODE_CEIL, result_dst, op[0]); in visit_expression()