| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 210 case TGSI_OPCODE_SNE: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_info.c | 90 { 1, 2, 0, 0, 0, 0, COMP, "SNE", TGSI_OPCODE_SNE },
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 381 #define TGSI_OPCODE_SNE 50 macro
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 392 #define TGSI_OPCODE_SNE 50 macro
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_tgsi_to_rc.c | 72 case TGSI_OPCODE_SNE: return RC_OPCODE_SNE; in translate_opcode()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_tgsi_alu.c | 165 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break; in emit_set_cond()
809 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond; in si_shader_context_init_alu()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 1542 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); in visit_expression()
1589 emit_asm(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); in visit_expression()
1620 emit_asm(ir, TGSI_OPCODE_SNE, st_dst_reg(temp), op[0], op[1]); in visit_expression()
1673 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); in visit_expression()
1681 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], op[1]); in visit_expression()
1812 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); in visit_expression()
1815 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_double(0.0)); in visit_expression()
1821 emit_asm(ir, TGSI_OPCODE_SNE, result_dst, op[0], st_src_reg_for_float(0.0)); in visit_expression()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc_optimize.c | 114 [ TGSI_OPCODE_SNE ] = { false, false, 0, 1, 2 },
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| D | i915_fpc_translate.c | 879 case TGSI_OPCODE_SNE: in i915_translate_instruction()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_aos.c | 653 case TGSI_OPCODE_SNE: in lp_emit_instruction_aos()
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| D | lp_bld_tgsi_action.c | 2454 bld_base->op_actions[TGSI_OPCODE_SNE].emit = sne_emit_cpu; in lp_set_default_actions_cpu()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nvfx_vertprog.c | 667 case TGSI_OPCODE_SNE: in nvfx_vertprog_parse_instruction()
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| D | nvfx_fragprog.c | 710 case TGSI_OPCODE_SNE: in nvfx_fragprog_parse_instruction()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_insn.c | 2833 case TGSI_OPCODE_SNE: in svga_emit_instruction()
3517 emit->info.opcode_count[TGSI_OPCODE_SNE] >= 1 || in needs_to_create_common_immediate()
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| D | svga_tgsi_vgpu10.c | 5564 case TGSI_OPCODE_SNE: in emit_vgpu10_instruction()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | tgsi_to_nir.c | 1510 [TGSI_OPCODE_SNE] = nir_op_sne,
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 776 case TGSI_OPCODE_SNE: in getSetCond()
3443 case TGSI_OPCODE_SNE: in handleInstruction()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 10300 [TGSI_OPCODE_SNE] = { ALU_OP2_SETNE, tgsi_op2},
10498 [TGSI_OPCODE_SNE] = { ALU_OP2_SETNE, tgsi_op2},
10720 [TGSI_OPCODE_SNE] = { ALU_OP2_SETNE, tgsi_op2},
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| /external/mesa3d/src/gallium/state_trackers/nine/ |
| D | nine_shader.c | 1892 case NINED3DSHADER_REL_OP_NE: return TGSI_OPCODE_SNE; in sm1_insn_flags_to_tgsi_setop()
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| /external/virglrenderer/src/ |
| D | vrend_shader.c | 3676 case TGSI_OPCODE_SNE: in iter_instruction()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_exec.c | 5188 case TGSI_OPCODE_SNE: in exec_instruction()
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