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Searched refs:TGSI_WRITEMASK_XYZ (Results 1 – 25 of 26) sorted by relevance

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/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_util.c264 read_mask = write_mask & TGSI_WRITEMASK_XYZ ? TGSI_WRITEMASK_X : 0; in tgsi_util_get_inst_usage_mask()
276 read_mask = TGSI_WRITEMASK_XYZ; in tgsi_util_get_inst_usage_mask()
284 read_mask = src_idx == 0 ? TGSI_WRITEMASK_XYZ : TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
313 read_mask = TGSI_WRITEMASK_XYZ; in tgsi_util_get_inst_usage_mask()
/external/mesa3d/src/gallium/state_trackers/nine/
Dnine_ff.c451 … ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), ureg_negate(_CONST(101))); in nine_ff_build_vs()
452 ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100)); in nine_ff_build_vs()
459 ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp)); in nine_ff_build_vs()
565 … struct ureg_dst aVtx_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); in nine_ff_build_vs()
573 … struct ureg_dst aNrm_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); in nine_ff_build_vs()
647 ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), vs->aNrm); in nine_ff_build_vs()
652 ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), vs->aVtx); in nine_ff_build_vs()
657 tmp.WriteMask = TGSI_WRITEMASK_XYZ; in nine_ff_build_vs()
663 …ureg_ADD(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), ureg_src(aVtx_normed), ureg_negate… in nine_ff_build_vs()
671 tmp.WriteMask = TGSI_WRITEMASK_XYZ; in nine_ff_build_vs()
[all …]
Dnine_shader.c1596 ureg_MUL(ureg, ureg_writemask(dst, TGSI_WRITEMASK_XYZ), in DECL_SPECIAL()
1601 ureg_MAD(ureg, ureg_writemask(dst, TGSI_WRITEMASK_XYZ), in DECL_SPECIAL()
2353 ureg_MOV(ureg, ureg_writemask(ureg_saturate(dst), TGSI_WRITEMASK_XYZ), tx->regs.vT[s]); in DECL_SPECIAL()
2552 tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_XYZ); in DECL_SPECIAL()
2689 tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_XYZ); in DECL_SPECIAL()
3440 ureg_MOV(ureg, ureg_writemask(tx->regs.oPos_out, TGSI_WRITEMASK_XYZ), ureg_src(tx->regs.oPos)); in shader_add_vs_viewport_transform()
3489 ureg_LRP(ureg, ureg_writemask(oCol0, TGSI_WRITEMASK_XYZ), in shader_add_ps_fog_stage()
/external/mesa3d/src/gallium/auxiliary/vl/
Dvl_mc.c198 ureg_CMP(shader, ureg_writemask(ref, TGSI_WRITEMASK_XYZ), in create_ref_frag_shader()
218 …ureg_TEX(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XYZ), TGSI_TEXTURE_2D, ureg_src(ref), sam… in create_ref_frag_shader()
355 ureg_MAD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), in create_ycbcr_frag_shader()
359 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), in create_ycbcr_frag_shader()
362 …ureg_MUL(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XYZ), ureg_src(tmp), ureg_imm1f(shader, i… in create_ycbcr_frag_shader()
Dvl_idct.c245 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XYZ), ureg_src(m[7][1])); in create_mismatch_frag_shader()
Dvl_compositor.c394 ureg_TEX(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XYZ), in create_frag_shader_palette()
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c227 read_mask = TGSI_WRITEMASK_XYZ; in tgsi_util_get_inst_usage_mask()
260 read_mask = write_mask & TGSI_WRITEMASK_XYZ ? TGSI_WRITEMASK_X : 0; in tgsi_util_get_inst_usage_mask()
Dtgsi_aa_point.c244 TGSI_WRITEMASK_XYZ, in aa_epilog()
Dtgsi_scan.c125 mask = usage_mask_after_swizzle & TGSI_WRITEMASK_XYZ; in scan_src_operand()
Dtgsi_lowering.c688 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZ) { in transform_log()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_info.c136 readmask = TGSI_WRITEMASK_XYZ; in analyse_tex()
231 readmask = TGSI_WRITEMASK_XYZ; in analyse_sample()
/external/mesa3d/src/mesa/state_tracker/
Dst_mesa_to_tgsi.c560 ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), in compile_instruction()
565 ureg_MAD(ureg, ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ), in compile_instruction()
590 ureg_MOV(ureg, ureg_writemask(temp, TGSI_WRITEMASK_XYZ), src[0]); in compile_instruction()
Dst_tgsi_lower_yuv.c265 reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ); in yuv_to_rgb()
Dst_atifs_to_tgsi.c385 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ); in compile_instruction()
/external/virglrenderer/src/gallium/include/pipe/
Dp_shader_tokens.h94 #define TGSI_WRITEMASK_XYZ 0x07 macro
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h90 #define TGSI_WRITEMASK_XYZ 0x07 macro
/external/mesa3d/src/gallium/drivers/llvmpipe/
Dlp_setup_point.c215 unsigned fragcoord_usage_mask = TGSI_WRITEMASK_XYZ; in setup_point_coefficients()
Dlp_setup_line.c170 unsigned fragcoord_usage_mask = TGSI_WRITEMASK_XYZ; in setup_line_coefficients()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c1860 if (dst.mask & TGSI_WRITEMASK_XYZ) { in emit_tex()
1890 writemask( dst2, TGSI_WRITEMASK_XYZ ), in emit_tex()
2529 if (dst.mask & TGSI_WRITEMASK_XYZ) { in emit_log()
2596 if (dst.mask & TGSI_WRITEMASK_XYZ && src0.base.srcMod && in emit_log()
3146 writemask(temp_pos, TGSI_WRITEMASK_XYZ), in emit_vs_postamble()
Dsvga_tgsi_vgpu10.c4089 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) { in emit_log()
5665 writemask_dst(&tmp_pos_dst, TGSI_WRITEMASK_XYZ); in emit_vpos_instructions()
5701 writemask_dst(&pos_dst, TGSI_WRITEMASK_XYZ); in emit_vpos_instructions()
5876 writemask_dst(&tmp_dst, TGSI_WRITEMASK_XYZ); in emit_fragcoord_instructions()
/external/mesa3d/src/gallium/auxiliary/draw/
Ddraw_pipe_aapoint.c313 TGSI_WRITEMASK_XYZ, in aa_transform_epilog()
Ddraw_pipe_aaline.c280 TGSI_WRITEMASK_XYZ, in aa_transform_epilog()
/external/mesa3d/src/gallium/state_trackers/xa/
Dxa_tgsi.c568 ureg_MOV(ureg, ureg_writemask(src, TGSI_WRITEMASK_XYZ), in create_fs()
/external/virglrenderer/src/
Dvrend_shader.c329 case TGSI_WRITEMASK_XYZ: in get_wm_string()
1862 twm = TGSI_WRITEMASK_XYZ; in emit_txq()
2125 twm = TGSI_WRITEMASK_XYZ; in translate_tex()
2130 twm = TGSI_WRITEMASK_XYZ; in translate_tex()
2138 twm = TGSI_WRITEMASK_XYZ; in translate_tex()
2150 twm = TGSI_WRITEMASK_XYZ; in translate_tex()
2177 gwm = TGSI_WRITEMASK_XYZ; in translate_tex()
/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_surface.c948 struct ureg_dst zdst3 = ureg_writemask(data, TGSI_WRITEMASK_XYZ); in nv50_blitter_make_fp()
964 outz = ureg_writemask(out, TGSI_WRITEMASK_XYZ); in nv50_blitter_make_fp()

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