| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 280 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
284 read_mask = src_idx == 0 ? TGSI_WRITEMASK_XYZ : TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
320 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
332 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
338 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
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| D | tgsi_ureg.c | 252 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst_register()
398 return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW); in ureg_DECL_output()
1188 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; /* FIXME! */ in emit_decl_fs()
1219 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_temps()
1244 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range()
1265 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range2D()
1372 TGSI_WRITEMASK_XYZW); in emit_decls()
1382 TGSI_WRITEMASK_XYZW); in emit_decls()
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| D | tgsi_build.c | 106 declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_default_declaration()
967 dst_register.WriteMask = TGSI_WRITEMASK_XYZW; in tgsi_default_dst_register()
989 assert( mask <= TGSI_WRITEMASK_XYZW ); in tgsi_build_dst_register()
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| D | tgsi_scan.c | 528 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW) in tgsi_is_passthrough_shader()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_lowering.c | 287 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_lrp()
292 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_lrp()
304 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_lrp()
335 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_frc()
340 reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); in transform_frc()
349 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_frc()
381 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_pow()
405 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_pow()
832 if (dst->Register.WriteMask & TGSI_WRITEMASK_XYZW) { in transform_dotp()
883 reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); in transform_dotp()
[all …]
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| D | tgsi_util.c | 250 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
374 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
394 read_mask = TGSI_WRITEMASK_XYZW; in tgsi_util_get_inst_usage_mask()
414 read_mask = TGSI_WRITEMASK_XYZW; /* assume all channels are read */ in tgsi_util_get_inst_usage_mask()
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| D | tgsi_point_sprite.c | 256 ts->point_size_tmp, TGSI_WRITEMASK_XYZW); in psprite_prolog()
285 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst()
347 TGSI_WRITEMASK_XYZW, in psprite_emit_vertex_inst()
357 TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst()
383 dstReg, TGSI_WRITEMASK_XYZW); in psprite_emit_vertex_inst()
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| D | tgsi_ureg.c | 297 assert(usage_mask <= TGSI_WRITEMASK_XYZW); in ureg_DECL_fs_input_cyl_centroid_layout()
347 ureg->nr_input_regs, TGSI_WRITEMASK_XYZW, array_id, array_size); in ureg_DECL_fs_input_cyl_centroid()
488 return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW, in ureg_DECL_output()
500 TGSI_WRITEMASK_XYZW, in ureg_DECL_output_array()
1553 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_atomic_2d()
1627 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_temps()
1652 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range()
1673 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_range2D()
1699 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_sampler_view()
1727 out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; in emit_decl_image()
[all …]
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| D | tgsi_emulate.c | 90 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in passthrough_edgeflag()
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| D | tgsi_build.c | 106 declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_default_declaration()
985 dst_register.WriteMask = TGSI_WRITEMASK_XYZW; in tgsi_default_dst_register()
1007 assert( mask <= TGSI_WRITEMASK_XYZW ); in tgsi_build_dst_register()
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| D | tgsi_ureg.h | 1003 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst_array_register()
1034 dst.WriteMask = TGSI_WRITEMASK_XYZW; in ureg_dst()
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| D | tgsi_transform.h | 197 decl.Declaration.UsageMask = TGSI_WRITEMASK_XYZW; in tgsi_transform_sampler_view_decl()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_atifs_to_tgsi.c | 717 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
733 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
744 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
759 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
770 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
781 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
794 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
805 inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_instr()
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| D | st_cb_drawpixels_shader.c | 152 TGSI_WRITEMASK_XYZW, in transform_instr()
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| D | st_tgsi_lower_yuv.c | 240 ctx->tmp[i].dst.Register.WriteMask = TGSI_WRITEMASK_XYZW; in emit_decls()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_info.c | 142 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex()
149 readmask = TGSI_WRITEMASK_XYZW; in analyse_tex()
235 readmask = TGSI_WRITEMASK_XYZW; in analyse_sample()
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_vs_draw.c | 253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst()
265 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; in transform_inst()
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_blit.c | 68 void *fs[PIPE_MAX_TEXTURE_TYPES][TGSI_WRITEMASK_XYZW + 1][3];
596 set_fragment_shader(ctx, TGSI_WRITEMASK_XYZW, in util_blit_pixels_tex()
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| D | u_simple_shaders.c | 275 if (writemask != TGSI_WRITEMASK_XYZW) { in util_make_fragment_tex_shader_writemask()
326 TGSI_WRITEMASK_XYZW, in util_make_fragment_tex_shader()
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| D | u_pstipple.c | 345 TGSI_WRITEMASK_XYZW, in pstip_transform_prolog()
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 102 #define TGSI_WRITEMASK_XYZW 0x0F macro
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 98 #define TGSI_WRITEMASK_XYZW 0x0F macro
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| /external/mesa3d/src/gallium/state_trackers/nine/ |
| D | nine_ff.c | 667 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
693 tmp.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
706 writemask = TGSI_WRITEMASK_XYZW; in nine_ff_build_vs()
1481 dst.WriteMask = TGSI_WRITEMASK_XYZW; in nine_ff_build_ps()
1488 if (dst.WriteMask != TGSI_WRITEMASK_XYZW) { in nine_ff_build_ps()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_nir.c | 339 info->output_usagemask[i] = TGSI_WRITEMASK_XYZW; in si_nir_scan_shader()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc_optimize.c | 584 current->FullInstruction.Dst[0].Register.WriteMask == TGSI_WRITEMASK_XYZW && in i915_fpc_optimize_useless_mov_after_inst()
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