Searched refs:TIDReg (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | SIMachineFunctionInfo.h | 33 unsigned TIDReg; variable 137 bool hasCalculatedTID() const { return TIDReg != AMDGPU::NoRegister; }; in hasCalculatedTID() 138 unsigned getTIDReg() const { return TIDReg; }; in getTIDReg() 139 void setTIDReg(unsigned Reg) { TIDReg = Reg; } in setTIDReg()
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D | SIInstrInfo.cpp | 737 unsigned TIDReg = MFI->getTIDReg(); in calculateLDSSpillAddress() local 743 TIDReg = RI.findUnusedRegister(MF->getRegInfo(), &AMDGPU::VGPR_32RegClass); in calculateLDSSpillAddress() 744 if (TIDReg == AMDGPU::NoRegister) in calculateLDSSpillAddress() 745 return TIDReg; in calculateLDSSpillAddress() 779 BuildMI(Entry, Insert, DL, get(AMDGPU::V_MUL_U32_U24_e32), TIDReg) in calculateLDSSpillAddress() 783 BuildMI(Entry, Insert, DL, get(AMDGPU::V_MAD_U32_U24), TIDReg) in calculateLDSSpillAddress() 786 .addReg(TIDReg); in calculateLDSSpillAddress() 788 BuildMI(Entry, Insert, DL, get(AMDGPU::V_ADD_I32_e32), TIDReg) in calculateLDSSpillAddress() 789 .addReg(TIDReg) in calculateLDSSpillAddress() 794 TIDReg) in calculateLDSSpillAddress() [all …]
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D | SIMachineFunctionInfo.cpp | 34 TIDReg(AMDGPU::NoRegister), in SIMachineFunctionInfo()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIMachineFunctionInfo.h | 85 unsigned TIDReg = AMDGPU::NoRegister; variable 242 bool hasCalculatedTID() const { return TIDReg != 0; }; in hasCalculatedTID() 243 unsigned getTIDReg() const { return TIDReg; }; in getTIDReg() 244 void setTIDReg(unsigned Reg) { TIDReg = Reg; } in setTIDReg()
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D | SIInstrInfo.cpp | 1043 unsigned TIDReg = MFI->getTIDReg(); in calculateLDSSpillAddress() local 1049 TIDReg = RI.findUnusedRegister(MF->getRegInfo(), &AMDGPU::VGPR_32RegClass, in calculateLDSSpillAddress() 1051 if (TIDReg == AMDGPU::NoRegister) in calculateLDSSpillAddress() 1052 return TIDReg; in calculateLDSSpillAddress() 1085 BuildMI(Entry, Insert, DL, get(AMDGPU::V_MUL_U32_U24_e32), TIDReg) in calculateLDSSpillAddress() 1089 BuildMI(Entry, Insert, DL, get(AMDGPU::V_MAD_U32_U24), TIDReg) in calculateLDSSpillAddress() 1092 .addReg(TIDReg); in calculateLDSSpillAddress() 1094 getAddNoCarry(Entry, Insert, DL, TIDReg) in calculateLDSSpillAddress() 1095 .addReg(TIDReg) in calculateLDSSpillAddress() 1100 TIDReg) in calculateLDSSpillAddress() [all …]
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