Searched refs:TM1 (Results 1 – 4 of 4) sorted by relevance
/external/llvm/unittests/Transforms/IPO/ |
D | WholeProgramDevirt.cpp | 28 TypeMemberInfo TM1{&VT1, 0}; in TEST() local 31 {&TM1, /*IsBigEndian=*/false}, in TEST() 41 TM1.Offset = 4; in TEST() 48 TM1.Offset = 8; in TEST() 69 TypeMemberInfo TM1{&VT1, 0}; in TEST() local 72 {&TM1, /*IsBigEndian=*/false}, in TEST() 76 TM1.Offset = 4; in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Transforms/IPO/ |
D | WholeProgramDevirt.cpp | 28 TypeMemberInfo TM1{&VT1, 0}; in TEST() local 31 {&TM1, /*IsBigEndian=*/false}, in TEST() 41 TM1.Offset = 4; in TEST() 48 TM1.Offset = 8; in TEST() 69 TypeMemberInfo TM1{&VT1, 0}; in TEST() local 72 {&TM1, /*IsBigEndian=*/false}, in TEST() 76 TM1.Offset = 4; in TEST()
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/external/u-boot/drivers/usb/musb-new/ |
D | omap2430.h | 47 # define TM1 (1 << 0) macro
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringMIPS32.cpp | 2555 auto *TM1 = I32Reg(), *TM2 = I32Reg(), *TM3 = I32Reg(), *TM4 = I32Reg(); in lowerInt64Arithmetic() local 2561 _mul(TM1, Src0HiR, Src1LoR); in lowerInt64Arithmetic() 2563 _addu(TM3, TM1, T2); in lowerInt64Arithmetic()
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