Searched refs:TRAINING_SW_1_REG (Results 1 – 2 of 2) sorted by relevance
244 #define TRAINING_SW_1_REG 0x15b4 macro
274 TRAINING_SW_1_REG, (1 << 16), (1 << 16))); in ddr3_tip_dynamic_read_leveling()754 TRAINING_SW_1_REG, (1 << 16), (1 << 16))); in ddr3_tip_dynamic_per_bit_read_leveling()