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Searched refs:TRAINING_WL_REG (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_regs.h322 #define TRAINING_WL_REG 0x16ac macro
Dddr3_training_leveling.c1005 TRAINING_WL_REG, in ddr3_tip_dynamic_write_leveling()
1499 TRAINING_WL_REG, 0x50, 0xff)); in ddr3_tip_dynamic_write_leveling_seq()
1502 TRAINING_WL_REG, 0x5c, 0xff)); in ddr3_tip_dynamic_write_leveling_seq()
1517 TRAINING_WL_REG, 0xff5c, 0xffff)); in ddr3_tip_dynamic_write_leveling_seq()