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Searched refs:TRN_DBG_RDY_INC_PH_2TO1_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_plat.c1257 reg_val &= ~(TRN_DBG_RDY_INC_PH_2TO1_MASK << TRN_DBG_RDY_INC_PH_2TO1_OFFS(0)); in mv_ddr_pre_training_soc_config()
1260 reg_val &= ~(TRN_DBG_RDY_INC_PH_2TO1_MASK << TRN_DBG_RDY_INC_PH_2TO1_OFFS(1)); in mv_ddr_pre_training_soc_config()
1263 reg_val &= ~(TRN_DBG_RDY_INC_PH_2TO1_MASK << TRN_DBG_RDY_INC_PH_2TO1_OFFS(3)); in mv_ddr_pre_training_soc_config()
1266 reg_val &= ~(TRN_DBG_RDY_INC_PH_2TO1_MASK << TRN_DBG_RDY_INC_PH_2TO1_OFFS(4)); in mv_ddr_pre_training_soc_config()
1269 reg_val &= ~(TRN_DBG_RDY_INC_PH_2TO1_MASK << TRN_DBG_RDY_INC_PH_2TO1_OFFS(5)); in mv_ddr_pre_training_soc_config()
Dmv_ddr_regs.h263 #define TRN_DBG_RDY_INC_PH_2TO1_MASK 0x7 macro