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Searched refs:TSC_CNTCR_HDBG (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-tegra114/
Dsysctr.h22 #define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ macro
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dsysctr.h23 #define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ macro
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dsysctr.h23 #define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ macro
/external/u-boot/arch/arm/mach-tegra/tegra114/
Dclock.c729 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dclock.c927 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dclock.c1060 val |= TSC_CNTCR_ENABLE | TSC_CNTCR_HDBG; in arch_timer_init()