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Searched refs:TSR (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td63 def TSR : XForm_htm2 <31, 750,
131 (TSR (HTM_get_imm imm:$L))>;
164 (TSR 1)>;
167 (TSR 0)>;
DP9InstrResources.td197 TSR,
/external/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td63 def TSR : XForm_htm2 <31, 750,
131 (TSR (HTM_get_imm imm:$L))>;
164 (TSR 1)>;
167 (TSR 0)>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonEarlyIfConv.cpp205 unsigned TSR, unsigned FR, unsigned FSR);
781 unsigned PredR, unsigned TR, unsigned TSR, unsigned FR, unsigned FSR) { in buildMux() argument
807 .addReg(TR, 0, TSR) in buildMux()
820 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
826 TR = RO.getReg(), TSR = RO.getSubReg(); in updatePhiNodes()
835 TR = SR, TSR = SSR; in updatePhiNodes()
846 FP.PredR, TR, TSR, FR, FSR); in updatePhiNodes()
849 MuxSR = TSR; in updatePhiNodes()
/external/llvm/lib/Target/Hexagon/
DHexagonEarlyIfConv.cpp781 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
787 TR = RO.getReg(), TSR = RO.getSubReg(); in updatePhiNodes()
796 TR = SR, TSR = SSR; in updatePhiNodes()
814 .addReg(TR, 0, TSR) in updatePhiNodes()
/external/u-boot/arch/sh/include/asm/
Dcpu_sh7722.h877 #define TSR 0xA44800B8 macro
/external/u-boot/arch/powerpc/include/asm/
Dprocessor.h685 #define TSR SPRN_TSR /* Timer Status Register */ macro
/external/u-boot/drivers/net/
Dmacb.c781 tsr = macb_readl(macb, TSR); in _macb_halt()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dstart.S293 mtspr TSR,r1 /* clear all timer exception status */
/external/v8/src/ppc/
Dconstants-ppc.h1645 V(tsr, TSR, 0x7C0005DC) \
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart3.csv4370 ,"RO","TSR","Timisoara","Timisoara",,"---4----","AI","9601",,,
7072 ,"SE","TSR","Torsaker","Torsaker","Y","--3-----","RL","0701",,"6304N 01744E",
22048 ,"US","TSR","Petersburg","Petersburg","TN","--3-----","RL","0701",,"3624N 08258W",
D2013-1_UNLOCODE_CodeListPart2.csv17346 ,"JP","TSR","Tsuruoka","Tsuruoka","06","--3-----","RQ","0907",,"3843N 13949E",
20211 ,"MY","TSR","Tanjong Surat","Tanjong Surat",,"1-------","QQ","8103",,,
D2013-1_UNLOCODE_CodeListPart1.csv33458 ,"FR","TSR","Borest","Borest",,"--3-----","RL","0901",,,
/external/toolchain-utils/android_bench_suite/panorama_input/
Dtest_034.ppm2088 …͹�ʷ�ɽ�ϑ��#'4*,6./:45=56>446003/-0.,/-*.*(,(&)'%(%%'&&(&&('')***,,,/.-431:87TSR^[_(&)"=BO��о��…
Dtest_008.ppm110 #*%,#"/,(A=:;74ROK���TSR)& (%?.-?.-J'.eBI> #�3