Searched refs:T_BIT (Results 1 – 9 of 9) sorted by relevance
45 #define T_BIT 0x20 macro90 (((regs)->ARM_cpsr & T_BIT))
1051 if (((texGenEnabled & T_BIT) && planeT[0] != 0.0) || in r200_need_dis_texgen()1057 if (!(texGenEnabled & T_BIT)) { in r200_need_dis_texgen()1061 needtgenable |= T_BIT; in r200_need_dis_texgen()1066 ((texGenEnabled & T_BIT) && planeT[2] != 0.0) || in r200_need_dis_texgen()1073 ((texGenEnabled & T_BIT) && planeT[3] != 0.0) || in r200_need_dis_texgen()1123 if (texUnit->TexGenEnabled & T_BIT) { in r200_validate_texgen()1169 if (needtgenable & (S_BIT | T_BIT)) { in r200_validate_texgen()1185 (texUnit->TexGenEnabled & T_BIT) ? texUnit->GenT.ObjectPlane : I + 4, in r200_validate_texgen()1197 if (needtgenable & (S_BIT | T_BIT)) { in r200_validate_texgen()1212 (texUnit->TexGenEnabled & T_BIT) ? texUnit->GenT.EyePlane : I + 4, in r200_validate_texgen()[all …]
398 if (texUnit->TexGenEnabled & T_BIT) { in texgen()525 else if (texUnit->TexGenEnabled & T_BIT) in validate_texgen_stage()534 if (texUnit->TexGenEnabled == (S_BIT|T_BIT|R_BIT)) { in validate_texgen_stage()542 else if (texUnit->TexGenEnabled == (S_BIT|T_BIT) && in validate_texgen_stage()
99 orrne ip, ip, #T_BIT @ Set T if Thumb
815 if ((texUnit->TexGenEnabled & (S_BIT|T_BIT|R_BIT|Q_BIT)) == 0) { in radeon_validate_texgen()829 (texUnit->TexGenEnabled & T_BIT) && in radeon_validate_texgen()
308 if (texUnit->TexGenEnabled & T_BIT) { in compute_texgen()
740 _mesa_set_enable(ctx, GL_TEXTURE_GEN_T, !!(genEnabled & T_BIT)); in pop_enable_group()801 _mesa_set_enable(ctx, GL_TEXTURE_GEN_T, !!(unit->TexGenEnabled & T_BIT)); in pop_texture_group()
619 if (texUnit->TexGenEnabled & T_BIT) { in update_texgen()
1190 #define T_BIT 2 macro1193 #define STR_BITS (S_BIT | T_BIT | R_BIT)