Searched refs:TargetReg (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RedundantCopyElimination.cpp | 105 unsigned TargetReg = CompBr->getOperand(0).getReg(); in optimizeCopy() local
106 if (!TargetReg) in optimizeCopy()
108 assert(TargetRegisterInfo::isPhysicalRegister(TargetReg) && in optimizeCopy()
113 for (MCRegAliasIterator AI(TargetReg, TRI, true); AI.isValid(); ++AI) in optimizeCopy()
118 unsigned SmallestDef = TargetReg; in optimizeCopy()
131 (TargetReg == DefReg || TRI->isSuperRegister(DefReg, TargetReg))) { in optimizeCopy()
145 if (MI->modifiesRegister(TargetReg, TRI)) in optimizeCopy()
158 MBB->addLiveIn(TargetReg); in optimizeCopy()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 178 unsigned TargetReg = Inst.getOperand(1).getReg(); in EmitInstruction() local
179 emitMask(TargetReg, IndirectBranchMaskReg, STI); in EmitInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 187 unsigned TargetReg = Inst.getOperand(1).getReg(); in EmitInstruction() local
188 emitMask(TargetReg, IndirectBranchMaskReg, STI); in EmitInstruction()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 716 unsigned TargetReg = I->getOperand(1).getReg(); in expandEhReturn() local
724 .addReg(TargetReg) in expandEhReturn()
727 .addReg(TargetReg) in expandEhReturn()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 2080 unsigned TargetReg = MI.getOperand(0).getReg(); in expandVSXMemPseudo() local
2082 if ((TargetReg >= PPC::F0 && TargetReg <= PPC::F31) || in expandVSXMemPseudo()
2083 (TargetReg >= PPC::VSL0 && TargetReg <= PPC::VSL31)) in expandVSXMemPseudo()
2144 unsigned TargetReg = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
2145 if (PPC::VSFRCRegClass.contains(TargetReg)) { in expandPostRAPseudo()
2166 unsigned TargetReg = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
2167 if (PPC::VSFRCRegClass.contains(TargetReg)) in expandPostRAPseudo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 881 unsigned TargetReg = I->getOperand(1).getReg(); in expandEhReturn() local
889 .addReg(TargetReg) in expandEhReturn()
892 .addReg(TargetReg) in expandEhReturn()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 210 const SmallSet<unsigned, 2> &TargetReg,
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