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Searched refs:UADDO (Results 1 – 25 of 45) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h226 SADDO, UADDO, enumerator
DSelectionDAG.h905 case ISD::UADDO:
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h232 SADDO, UADDO, enumerator
DSelectionDAG.h1183 case ISD::UADDO:
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h251 SADDO, UADDO, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp136 case ISD::UADDO: in PromoteIntegerResult()
751 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_UADDSUBO()
1474 case ISD::UADDO: in ExpandIntegerResult()
1817 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
1854 ISD::UADDO : ISD::USUBO, in ExpandIntRes_ADDSUB()
1864 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
1993 unsigned Opc = N->getOpcode() == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandIntRes_UADDSUBO()
2002 auto Opc = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; in ExpandIntRes_UADDSUBO()
2008 auto Cond = N->getOpcode() == ISD::UADDO ? ISD::SETULT : ISD::SETUGT; in ExpandIntRes_UADDSUBO()
DSelectionDAGDumper.cpp271 case ISD::UADDO: return "uaddo"; in getOperationName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
DSystemZISelLowering.cpp172 setOperationAction(ISD::UADDO, VT, Custom); in SystemZTargetLowering()
3238 case ISD::UADDO: in lowerXALUO()
3239 BaseOp = SystemZISD::UADDO; in lowerXALUO()
4814 case ISD::UADDO: in LowerOperation()
5000 OPCODE(UADDO); in getTargetNodeName()
DSystemZOperators.td278 def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>;
DSystemZISelDAGToDAG.cpp1323 case SystemZISD::UADDO: in tryFoldLoadStoreIntoMemOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp134 case ISD::UADDO: in PromoteIntegerResult()
744 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_UADDSUBO()
1399 case ISD::UADDO: in ExpandIntegerResult()
1762 ISD::UADDO : ISD::USUBO, in ExpandIntRes_ADDSUB()
1770 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
2527 SDValue Sum = DAG.getNode(N->getOpcode() == ISD::UADDO ? in ExpandIntRes_UADDSUBO()
2535 N->getOpcode () == ISD::UADDO ? in ExpandIntRes_UADDSUBO()
DSelectionDAGDumper.cpp229 case ISD::UADDO: return "uaddo"; in getOperationName()
DLegalizeDAG.cpp3357 case ISD::UADDO: in ExpandNode()
3361 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ? in ExpandNode()
3369 = Node->getOpcode() == ISD::UADDO ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp116 case ISD::UADDO: in PromoteIntegerResult()
620 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB; in PromoteIntRes_UADDSUBO()
1154 case ISD::UADDO: in ExpandIntegerResult()
2226 SDValue Sum = DAG.getNode(N->getOpcode() == ISD::UADDO ? in ExpandIntRes_UADDSUBO()
2234 N->getOpcode () == ISD::UADDO ? in ExpandIntRes_UADDSUBO()
DLegalizeDAG.cpp858 case ISD::UADDO: in LegalizeOp()
3585 case ISD::UADDO: in ExpandNode()
3589 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ? in ExpandNode()
3594 Node->getOpcode () == ISD::UADDO ? in ExpandNode()
/external/llvm/test/CodeGen/X86/
Dxaluo.ll174 ; UADDO
199 ; UADDO reg, 1 | NOT INC
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DReleaseNotes.rst290 should use ``UADDO``/``ADDCARRY``/``USUBO``/``SUBCARRY`` instead of the deprecated opcodes.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp487 case ISD::UADDO: in Select()
761 unsigned Opc = N->getOpcode() == ISD::UADDO ? in SelectUADDO_USUBO()
DR600ISelLowering.cpp175 setOperationAction(ISD::UADDO, MVT::i32, Custom); in R600TargetLowering()
483 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY); in LowerOperation()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dxaluo.ll412 ; UADDO
473 ; UADDO reg, 1 | NOT INC
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp136 setOperationAction(ISD::UADDO, MVT::i32, Custom); in R600TargetLowering()
622 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY); in LowerOperation()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp614 setOperationAction(ISD::UADDO, VT, Expand); in initActions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1336 setOperationAction(ISD::UADDO, VT, Expand); in HexagonTargetLowering()
1418 ISD::UADDO, ISD::SSUBO, ISD::USUBO, ISD::SMUL_LOHI, ISD::UMUL_LOHI, in HexagonTargetLowering()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp241 setOperationAction(ISD::UADDO, MVT::i32, Custom); in AArch64TargetLowering()
242 setOperationAction(ISD::UADDO, MVT::i64, Custom); in AArch64TargetLowering()
1631 case ISD::UADDO: in getAArch64XALUOOp()
2343 case ISD::UADDO: in LowerOperation()
3638 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerBR_CC()
4087 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || in LowerSELECT()

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