| /external/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 64 Value *URem = Builder.CreateURem(UDividend, UDivisor); in generateSignedRemainderCode() local
65 Value *Xored = Builder.CreateXor(URem, DividendSign); in generateSignedRemainderCode()
68 if (Instruction *URemInst = dyn_cast<Instruction>(URem)) in generateSignedRemainderCode()
378 Rem->getOpcode() == Instruction::URem) && in expandRemainder()
488 Rem->getOpcode() == Instruction::URem) && in expandRemainderUpTo32Bits()
537 Rem->getOpcode() == Instruction::URem) && in expandRemainderUpTo64Bits()
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| D | BypassSlowDivision.cpp | 223 bool UseRemOp = Opcode == Instruction::SRem || Opcode == Instruction::URem; in bypassSlowDivision()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 64 Value *URem = Builder.CreateURem(UDividend, UDivisor); in generateSignedRemainderCode() local
65 Value *Xored = Builder.CreateXor(URem, DividendSign); in generateSignedRemainderCode()
68 if (Instruction *URemInst = dyn_cast<Instruction>(URem)) in generateSignedRemainderCode()
378 Rem->getOpcode() == Instruction::URem) && in expandRemainder()
488 Rem->getOpcode() == Instruction::URem) && in expandRemainderUpTo32Bits()
537 Rem->getOpcode() == Instruction::URem) && in expandRemainderUpTo64Bits()
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| D | SimplifyIndVar.cpp | 312 auto *URem = BinaryOperator::Create(BinaryOperator::URem, N, D, in replaceSRemWithURem() local
314 Rem->replaceAllUsesWith(URem); in replaceSRemWithURem()
621 if (IsSRem || Bin->getOpcode() == Instruction::URem) { in eliminateIVUser()
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/Transforms/Utils/ |
| D | IntegerDivision.cpp | 113 TEST(IntegerDivision, URem) { in TEST() argument
132 EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem); in TEST()
253 EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem); in TEST()
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| /external/llvm/unittests/Transforms/Utils/ |
| D | IntegerDivision.cpp | 113 TEST(IntegerDivision, URem) { in TEST() argument
132 EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem); in TEST()
253 EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem); in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CodeGenPrepare/NVPTX/ |
| D | bypass-slow-div.ll | 84 ; URem version of udiv_by_constant_negative_0
95 ; URem version of udiv_by_constant_negative_1
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | SimplifyIndVar.cpp | 254 if (IsSigned || Rem->getOpcode() == Instruction::URem) { in eliminateIVUser()
423 if (IsSigned || Rem->getOpcode() == Instruction::URem) { in simplifyIVUsers()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | DivRemPairs.cpp | 65 else if (I.getOpcode() == Instruction::URem) in optimizeDivRem()
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| D | CorrelatedValuePropagation.cpp | 512 Instr->getOpcode() == Instruction::URem); in processUDivOrURem()
722 case Instruction::URem: in runImpl()
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| /external/swiftshader/third_party/LLVM/lib/VMCore/ |
| D | Instruction.cpp | 118 case URem: return "urem"; in getOpcodeName()
404 case URem: { in isSafeToSpeculativelyExecute()
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| D | ConstantFold.cpp | 1042 case Instruction::URem: in ConstantFoldBinaryInstruction()
1092 case Instruction::URem: in ConstantFoldBinaryInstruction()
1195 case Instruction::URem: in ConstantFoldBinaryInstruction()
1236 case Instruction::URem: in ConstantFoldBinaryInstruction()
1346 case Instruction::URem: in ConstantFoldBinaryInstruction()
1451 case Instruction::URem: in ConstantFoldBinaryInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 26 Ops.push_back(binOpDescriptor(1, Instruction::URem)); in describeFuzzerIntOps()
104 case Instruction::URem: in binOpDescriptor()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 165 case Instruction::URem: in getIntImmCost()
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| /external/swiftshader/third_party/subzero/pnacl-llvm/ |
| D | NaClBitcodeDecoders.cpp | 92 LLVMOpcode = Instruction::URem; in DecodeBinaryOpcode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 275 I.getOpcode() == Instruction::URem) in promoteUniformOpToI32()
614 assert(Opc == Instruction::URem || Opc == Instruction::UDiv || in expandDivRem32()
765 if ((Opc == Instruction::URem || Opc == Instruction::UDiv || in visitBinaryOperator()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 95 case Instruction::URem: in createReplacementInstr()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 95 case Instruction::URem: in createReplacementInstr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 165 case Instruction::URem: in getIntImmCost()
456 if (Opcode == Instruction::UDiv || Opcode == Instruction::URem) in getArithmeticInstrCost()
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| /external/swiftshader/third_party/LLVM/lib/Target/CBackend/ |
| D | CBackend.cpp | 809 case Instruction::URem: in printConstant()
830 case Instruction::URem: in printConstant()
1137 case Instruction::URem: in printConstExprCast()
1201 case Instruction::URem: in printConstantWithCast()
1343 case Instruction::URem: in writeInstructionCast()
1389 case Instruction::URem: // Cast to unsigned first in writeOperandWithCast()
2562 case Instruction::URem: in visitBinaryOperator()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 659 case Instruction::URem: in CanEvaluateShuffled()
722 case Instruction::URem: in buildNew()
822 case Instruction::URem: in EvaluateInDifferentElementOrder()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | Instruction.h | 147 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
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| D | Instruction.def | 137 HANDLE_BINARY_INST(20, URem , BinaryOperator)
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| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Instruction.def | 118 HANDLE_BINARY_INST(18, URem , BinaryOperator)
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| /external/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
| D | Instruction.def | 133 HANDLE_BINARY_INST(20, URem , BinaryOperator)
|