/external/v8/src/wasm/baseline/mips/ |
D | liftoff-assembler-mips.h | 341 TurboAssembler::Ulh(dst.gp(), src_op); in Load() 344 TurboAssembler::Ulh(dst.low_gp(), src_op); in Load()
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/external/v8/src/mips/ |
D | macro-assembler-mips.h | 668 void Ulh(Register rd, const MemOperand& rs);
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D | macro-assembler-mips.cc | 1092 void TurboAssembler::Ulh(Register rd, const MemOperand& rs) { in Ulh() function in v8::internal::TurboAssembler
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/external/v8/src/wasm/baseline/mips64/ |
D | liftoff-assembler-mips64.h | 300 TurboAssembler::Ulh(dst.gp(), src_op); in Load()
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/external/v8/src/mips64/ |
D | macro-assembler-mips64.h | 616 void Ulh(Register rd, const MemOperand& rs);
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D | macro-assembler-mips64.cc | 1206 void TurboAssembler::Ulh(Register rd, const MemOperand& rs) { in Ulh() function in v8::internal::TurboAssembler
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/external/v8/src/compiler/mips/ |
D | code-generator-mips.cc | 1487 __ Ulh(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction() local
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/external/v8/src/compiler/mips64/ |
D | code-generator-mips64.cc | 1682 __ Ulh(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction() local
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | cdd5cadc78850fc7b9fde911d64a72ec.0001b9d7.honggfuzz.cov | 172 …w�4i{�~���n��� `��V>G0h�����9|�h5��&��Fr�"p���^vT�7���\�e���Dj�r<Ulh߭��W��v���պt��LO�(�…
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | cdd5cadc78850fc7b9fde911d64a72ec.0001b9d7.honggfuzz.cov | 172 …w�4i{�~���n��� `��V>G0h�����9|�h5��&��Fr�"p���^vT�7���\�e���Dj�r<Ulh߭��W��v���պt��LO�(�…
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 2435 def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 2977 def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 2033 case Mips::Ulh: in tryExpandInstruction()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenAsmWriter.inc | 1731 25187573U, // Ulh 4362 0U, // Ulh
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D | MipsGenMCCodeEmitter.inc | 8242 0, // Ulh = 503
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D | MipsGenInstrInfo.inc | 518 Ulh = 503, 4563 …:UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #503 = Ulh
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D | MipsGenAsmMatcher.inc | 7614 { 9447 /* ulh */, Mips::Ulh, Convert__GPR32AsmReg1_0__Mem2_1, 0, { MCK_GPR32AsmReg, MCK_Mem }, },
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 2483 case Mips::Ulh: in tryExpandInstruction()
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