Searched refs:UndefReg (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600OptimizeVectorRegisters.cpp | 67 std::vector<unsigned> UndefReg; member in __anonc30efe020111::RegSeqInfo
74 UndefReg.push_back(Chan); in RegSeqInfo()
159 if (CurrentUndexIdx >= Untouched->UndefReg.size()) in tryMergeVector()
162 ((*It).second, Untouched->UndefReg[CurrentUndexIdx++])); in tryMergeVector()
189 std::vector<unsigned> UpdatedUndef = BaseRSI->UndefReg; in RebuildVector()
230 RSI->UndefReg = UpdatedUndef; in RebuildVector()
298 unsigned NeededUndefs = 4 - RSI.UndefReg.size(); in tryMergeUsingFreeSlot()
313 PreviousRegSeqByUndefCount[RSI.UndefReg.size()].push_back(RSI.Instr); in trackRSI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600OptimizeVectorRegisters.cpp | 79 std::vector<unsigned> UndefReg; member in __anon22645c5a0111::RegSeqInfo
87 UndefReg.push_back(Chan); in RegSeqInfo()
183 if (CurrentUndexIdx >= Untouched->UndefReg.size()) in tryMergeVector()
186 ((*It).second, Untouched->UndefReg[CurrentUndexIdx++])); in tryMergeVector()
213 std::vector<unsigned> UpdatedUndef = BaseRSI->UndefReg; in RebuildVector()
252 RSI->UndefReg = UpdatedUndef; in RebuildVector()
320 unsigned NeededUndefs = 4 - RSI.UndefReg.size(); in tryMergeUsingFreeSlot()
335 PreviousRegSeqByUndefCount[RSI.UndefReg.size()].push_back(RSI.Instr); in trackRSI()
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| D | SIISelLowering.cpp | 8142 SDValue UndefReg = DAG.getRegister(MRI.createVirtualRegister(RC), VT); in PostISelFolding() local
8145 UndefReg, Src0, SDValue()); in PostISelFolding()
8159 Src0 = UndefReg; in PostISelFolding()
8160 Src1 = UndefReg; in PostISelFolding()
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| /external/llvm/lib/Target/X86/ |
| D | X86CallFrameOptimization.cpp | 495 unsigned UndefReg = MRI->createVirtualRegister(&X86::GR64RegClass); in adjustCallSequence() local
497 BuildMI(MBB, Context.Call, DL, TII->get(X86::IMPLICIT_DEF), UndefReg); in adjustCallSequence()
499 .addReg(UndefReg) in adjustCallSequence()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallFrameOptimization.cpp | 540 unsigned UndefReg = MRI->createVirtualRegister(&X86::GR64RegClass); in adjustCallSequence() local
542 BuildMI(MBB, Context.Call, DL, TII->get(X86::IMPLICIT_DEF), UndefReg); in adjustCallSequence()
544 .addReg(UndefReg) in adjustCallSequence()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | LiveIntervalAnalysis.cpp | 732 unsigned UndefReg = UndefUses[i]; in computeIntervals() local
733 (void)getOrCreateInterval(UndefReg); in computeIntervals()
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