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/external/eigen/test/
Dsmallvectors.cpp17 typedef Matrix<Scalar, 1, 4> V4; in smallVectors() typedef
25 V4 v4(x1, x2, x3, x4); in smallVectors()
45 VERIFY_RAISES_ASSERT(V4(1, 3)) in smallVectors()
46 VERIFY_RAISES_ASSERT(V4(2, 4)) in smallVectors()
47 VERIFY_RAISES_ASSERT(V4(1, Scalar(4))) in smallVectors()
48 VERIFY_RAISES_ASSERT(V4(Scalar(1), 4)) in smallVectors()
49 VERIFY_RAISES_ASSERT(V4(Scalar(1), Scalar(4))) in smallVectors()
50 VERIFY_RAISES_ASSERT(V4(Scalar(123), Scalar(123))) in smallVectors()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Difcvt3.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-CMP
3 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-BX
26 ; CHECK-V4-CMP: cmpne
27 ; CHECK-V4-CMP-NOT: cmpne
29 ; CHECK-V4-BX: bx
30 ; CHECK-V4-BX: bx
31 ; CHECK-V4-BX-NOT: bx
Dmulhi.ll2 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=V4
9 ; V4-LABEL: smulhi:
10 ; V4: smull
26 ; V4-LABEL: umulhi:
27 ; V4: umull
44 ; V4-LABEL: t3:
45 ; V4: smull
D2010-03-18-ldm-rtrn.ll1 ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4
10 ; V4: pop
11 ; V4-NEXT: mov pc, lr
/external/llvm/test/CodeGen/ARM/
Difcvt3.ll2 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-CMP
3 ; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s -check-prefix CHECK-V4-BX
26 ; CHECK-V4-CMP: cmpne
27 ; CHECK-V4-CMP-NOT: cmpne
29 ; CHECK-V4-BX: bx
30 ; CHECK-V4-BX: bx
31 ; CHECK-V4-BX-NOT: bx
Dmulhi.ll2 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=V4
9 ; V4-LABEL: smulhi:
10 ; V4: smull
26 ; V4-LABEL: umulhi:
27 ; V4: umull
44 ; V4-LABEL: t3:
45 ; V4: smull
D2010-03-18-ldm-rtrn.ll1 ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4
10 ; V4: pop
11 ; V4-NEXT: mov pc, lr
/external/libxml2/test/catalogs/
Dcatal3.sgml1 PUBLIC "-//OASIS//DTD DocBook XML CALS Table Model V4.1//EN" "calstblx.dtd"
3 PUBLIC "-//OASIS//ELEMENTS DocBook XML Information Pool V4.1//EN" "dbpool.mod"
4 …DocBook XML Document Hierarchy V4.1//EN" "dbhier.mod"PUBLIC "-//OASIS//ENTITIES DocBook XML Additi…
5 PUBLIC "-//OASIS//ENTITIES DocBook XML Notations V4.1//EN" "dbnotn.mod"
6 PUBLIC "-//OASIS//ENTITIES DocBook XML Character Entities V4.1//EN" "dbcent.mod"
Dwhitex.script2 public "-//OASIS//ENTITIES DocBook XML Character Entities V4.1.2//EN"
3 public " -//OASIS//ENTITIES DocBook XML Character Entities V4.1.2//EN"
4 public "-//OASIS//ENTITIES DocBook XML Character Entities V4.1.2//EN "
5 system urn:publicid:+-:OASIS:DTD+++DocBook+XML+V4.1.2:EN+
6 public urn:publicid:+-:OASIS:DTD+DocBook+XML+++V4.1.2:EN+
Ddocbook.script2 public "-//OASIS//ENTITIES DocBook XML Character Entities V4.1.2//EN"
3 system urn:publicid:-:OASIS:DTD+DocBook+XML+V4.1.2:EN
4 public urn:publicid:-:OASIS:DTD+DocBook+XML+V4.1.2:EN
Dregistry.script2 public "-//OASIS//ENTITIES DocBook XML Character Entities V4.1.2//EN"
4 system urn:publicid:-:OASIS:DTD+DocBook+XML+V4.1.2:EN
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dmulhi.ll2 ; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=V4
9 ; V4: smulhi:
10 ; V4: smull
26 ; V4: umulhi:
27 ; V4: umull
44 ; V4: t3:
45 ; V4: smull
D2010-03-18-ldm-rtrn.ll1 ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=V4
10 ; V4: pop
11 ; V4-NEXT: mov pc, lr
/external/libxaac/decoder/armv8/
Dixheaacd_sbr_imdct_using_fft.s108 LD2 {V4.S, V5.S}[0], [X5], X1
119 LD2 {V4.S, V5.S}[1], [X6] , X1
131 LD2 {V4.S, V5.S}[2], [X7] , X1
138 LD2 {V4.S, V5.S}[3], [X11] , X1
142 ADD V8.4S, V0.4S, V4.4S
147 SUB V9.4S, V0.4S, V4.4S
156 SUB V4.4S, V1.4S, V5.4S
189 SUB V6.4S, V4.4S, V5.4S
192 ADD V9.4S, V4.4S, V5.4S
195 ADD V4.4S, V8.4S, V1.4S
[all …]
Dixheaacd_overlap_add1.s96 LD1 {V4.4S}, [X1], #16
102 SMULL V28.2D, V27.2S, V4.2S
103 SMULL2 V29.2D, V27.4S, V4.4S
121 SMULL V28.2D, V27.2S, V4.2S
122 SMULL2 V29.2D, V27.4S, V4.4S
146 LD1 {V4.4S}, [X1], #16
171 SMULL V28.2D, V27.2S, V4.2S
172 SMULL2 V29.2D, V27.4S, V4.4S
178 SMULL V28.2D, V27.2S, V4.2S
179 SMULL2 V29.2D, V27.4S, V4.4S
[all …]
Dixheaacd_overlap_add2.s70 REV64 V4.4H, V6.4H
79 UMLSL V23.4S, V4.4H, V3.4H
101 REV64 V4.4H, V6.4H
102 UMLSL V23.4S, V4.4H, V3.4H
196 LD2 {V4.4H, V5.4H}, [X1], #16
199 UMLSL V23.4S, V4.4H, V2.4H
210 UMLSL V23.4S, V4.4H, V2.4H
245 LD2 {V4.4H, V5.4H}, [X1], #16
252 UMLSL V23.4S, V4.4H, V2.4H
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DTensorDimensions.h154 template <std::size_t V1=0, std::size_t V2=0, std::size_t V3=0, std::size_t V4=0, std::size_t V5=0>…
155 …o_size<V2>::type, typename non_zero_size<V3>::type, typename non_zero_size<V4>::type, typename non…
224 template <std::size_t V1, std::size_t V2, std::size_t V3, std::size_t V4, std::size_t V5>
225 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE std::size_t array_prod(const Sizes<V1, V2, V3, V4, V5>&) {
226 return Sizes<V1, V2, V3, V4, V5>::total_size;
385 …, std::size_t V2, std::size_t V3, std::size_t V4, std::size_t V5> struct array_size<const Sizes<V1…
386 static const size_t value = Sizes<V1,V2,V3,V4,V5>::count;
388 … V1, std::size_t V2, std::size_t V3, std::size_t V4, std::size_t V5> struct array_size<Sizes<V1,V2…
389 static const size_t value = Sizes<V1,V2,V3,V4,V5>::count;
391 …::size_t V3, std::size_t V4, std::size_t V5> EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE std::size_t arr…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
Dxxhash.cpp83 uint64_t V4 = Seed - PRIME64_1; in xxHash64() local
92 V4 = round(V4, endian::read64le(P)); in xxHash64()
96 H64 = rotl64(V1, 1) + rotl64(V2, 7) + rotl64(V3, 12) + rotl64(V4, 18); in xxHash64()
100 H64 = mergeRound(H64, V4); in xxHash64()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormats.td207 // LD Instruction Class in V2/V3/V4.
223 // LD Instruction Class in V2/V3/V4.
240 // ST Instruction Class in V4 can take SLOT0 & SLOT1.
241 // Definition of the instruction class CHANGED from V2/V3 to V4.
263 // ST Instruction Class in V4 can take SLOT0 & SLOT1.
264 // Definition of the instruction class CHANGED from V2/V3 to V4.
269 // SYSTEM Instruction Class in V4 can take SLOT0 only
276 // ALU32 Instruction Class in V2/V3/V4.
283 // XTYPE Instruction Class in V4.
285 // Name of the Instruction Class changed from ALU64 to XTYPE from V2/V3 to V4.
[all …]
/external/deqp/modules/gles3/performance/
Des3pShaderOperatorTests.cpp1964 V4 = VALUE_VEC4, in init() enumerator
2094 …{ commonFunctionsGroup, "abs", "abs", { V4, V4, N, N }, attrNegPos, -1, false, false, P… in init()
2096 …{ commonFunctionsGroup, "sign", "sign", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2098 …{ commonFunctionsGroup, "floor", "floor", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2100 …{ commonFunctionsGroup, "trunc", "trunc", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2102 …{ commonFunctionsGroup, "round", "round", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2104 …{ commonFunctionsGroup, "roundEven", "roundEven", { V4, V4, N, N }, attrNegPos, -1, false, … in init()
2106 …{ commonFunctionsGroup, "ceil", "ceil", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2108 …{ commonFunctionsGroup, "fract", "fract", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2111 …{ commonFunctionsGroup, "min", "min", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/
DAlignOfTest.cpp67 struct V4 : virtual V2 { int y; argument
68 ~V4() override;
70 struct V5 : V4, V3 { double z;
86 V4::~V4() {} in ~V4()
162 EXPECT_EQ(alignof(V4), alignof(AlignedCharArrayUnion<V4>)); in TEST()
227 EXPECT_EQ(sizeof(V4), sizeof(AlignedCharArrayUnion<V4>)); in TEST()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SimplifyCFG/
DPhiEliminate2.ll10 %V4 = or i32 %V2, %V1
16 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ]
23 ; CHECK-NEXT: %V4 = or i32 %V2, %V1
24 ; CHECK-NEXT: %V6 = select i1 %C, i32 %V4, i32 %V5, !prof !0, !unpredictable !1
/external/llvm/test/Transforms/SimplifyCFG/
DPhiEliminate2.ll10 %V4 = or i32 %V2, %V1
16 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ]
23 ; CHECK-NEXT: %V4 = or i32 %V2, %V1
24 ; CHECK-NEXT: %V6 = select i1 %C, i32 %V4, i32 %V5, !prof !0, !unpredictable !1
/external/llvm/unittests/Support/
DAlignOfTest.cpp67 struct V4 : virtual V2 { int y; argument
68 ~V4() override;
70 struct V5 : V4, V3 { double z;
86 V4::~V4() {} in ~V4()
148 [AlignOf<V4>::Alignment > 0]
188 EXPECT_LE(alignOf<V1>(), alignOf<V4>()); in TEST()
270 EXPECT_EQ(alignOf<V4>(), alignOf<AlignedCharArrayUnion<V4> >()); in TEST()
335 EXPECT_EQ(sizeof(V4), sizeof(AlignedCharArrayUnion<V4>)); in TEST()
/external/deqp/modules/gles2/performance/
Des2pShaderOperatorTests.cpp1954 V4 = VALUE_VEC4, in init() enumerator
2069 …{ commonFunctionsGroup, "abs", "abs", { V4, V4, N, N }, attrNegPos, -1, false, false, P… in init()
2071 …{ commonFunctionsGroup, "sign", "sign", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2073 …{ commonFunctionsGroup, "floor", "floor", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2075 …{ commonFunctionsGroup, "ceil", "ceil", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2077 …{ commonFunctionsGroup, "fract", "fract", { V4, V4, N, N }, attrNegPos, -1, false, false,… in init()
2080 …{ commonFunctionsGroup, "min", "min", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
2082 …{ commonFunctionsGroup, "max", "max", { V4, V4, V4, N }, attrNegPos, -1, false, false, P… in init()
2084 …{ commonFunctionsGroup, "clamp", "clamp", { V4, V4, V4, V4 }, attrSmall, 2, false, false, … in init()
2086 …{ commonFunctionsGroup, "mix", "mix", { V4, V4, V4, V4 }, attrNegPos, -1, false, false, P… in init()
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