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/external/llvm/test/MC/Disassembler/ARM/
Dthumb-v8.1a.txt2 …t llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
6 # CHECK-V8: warning: invalid instruction encoding
7 # CHECK-V8: [0x11,0xff,0x12,0x0b]
8 # CHECK-V8: ^
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x21,0xff,0x12,0x0b]
14 # CHECK-V8: ^
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0xff,0x54,0x0b]
20 # CHECK-V8: ^
[all …]
Darmv8.1a.txt2 …not llvm-mc -triple armv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x54,0x0b,0x12,0xf3]
14 # CHECK-V8: warning: invalid instruction encoding
15 # CHECK-V8: [0x12,0x0b,0x21,0xf3]
16 # CHECK-V8: warning: invalid instruction encoding
17 # CHECK-V8: [0x54,0x0c,0x12,0xf3]
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0x0c,0x21,0xf3]
29 # CHECK-V8: warning: invalid instruction encoding
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dthumb-v8.1a.txt2 …t llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
6 # CHECK-V8: warning: invalid instruction encoding
7 # CHECK-V8: [0x11,0xff,0x12,0x0b]
8 # CHECK-V8: ^
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x21,0xff,0x12,0x0b]
14 # CHECK-V8: ^
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0xff,0x54,0x0b]
20 # CHECK-V8: ^
[all …]
Darmv8.1a.txt2 …not llvm-mc -triple armv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x54,0x0b,0x12,0xf3]
14 # CHECK-V8: warning: invalid instruction encoding
15 # CHECK-V8: [0x12,0x0b,0x21,0xf3]
16 # CHECK-V8: warning: invalid instruction encoding
17 # CHECK-V8: [0x54,0x0c,0x12,0xf3]
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0x0c,0x21,0xf3]
29 # CHECK-V8: warning: invalid instruction encoding
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/
Dsparcv9-instructions.s1 ! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
4 ! V8: error: invalid instruction mnemonic
5 ! V8-NEXT: addc %g2, %g1, %g3
9 ! V8: error: invalid instruction mnemonic
10 ! V8-NEXT: addccc %g1, %g2, %g3
14 ! V8: error: invalid instruction mnemonic
15 ! V8-NEXT: subc %g2, %g1, %g3
19 ! V8: error: invalid instruction mnemonic
20 ! V8-NEXT: subccc %g1, %g2, %g3
24 ! V8: error: instruction requires a CPU feature not currently enabled
[all …]
/external/llvm/test/MC/Sparc/
Dsparcv9-instructions.s1 ! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
4 ! V8: error: invalid instruction mnemonic
5 ! V8-NEXT: addc %g2, %g1, %g3
9 ! V8: error: invalid instruction mnemonic
10 ! V8-NEXT: addccc %g1, %g2, %g3
14 ! V8: error: invalid instruction mnemonic
15 ! V8-NEXT: subc %g2, %g1, %g3
19 ! V8: error: invalid instruction mnemonic
20 ! V8-NEXT: subccc %g1, %g2, %g3
24 ! V8: error: instruction requires a CPU feature not currently enabled
[all …]
/external/v8/src/
Dcounters.h1122 HR(background_marking, V8.GCBackgroundMarking, 0, 10000, 101) \
1123 HR(background_scavenger, V8.GCBackgroundScavenger, 0, 10000, 101) \
1124 HR(background_sweeping, V8.GCBackgroundSweeping, 0, 10000, 101) \
1125 HR(detached_context_age_in_gc, V8.DetachedContextAgeInGC, 0, 20, 21) \
1126 HR(code_cache_reject_reason, V8.CodeCacheRejectReason, 1, 6, 6) \
1127 HR(errors_thrown_per_context, V8.ErrorsThrownPerContext, 0, 200, 20) \
1128 HR(debug_feature_usage, V8.DebugFeatureUsage, 1, 7, 7) \
1129 HR(incremental_marking_reason, V8.GCIncrementalMarkingReason, 0, 21, 22) \
1130 HR(incremental_marking_sum, V8.GCIncrementalMarkingSum, 0, 10000, 101) \
1131 HR(mark_compact_reason, V8.GCMarkCompactReason, 0, 21, 22) \
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dinvalid-fp-armv8.s1 …N: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V8
11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
[all …]
Dbasic-thumb2-instructions-v8.s3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt #63 @ encoding: [0xbf,0xba]
18 @ CHECK-V8: it pl @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
24 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
33 @ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d]
52 @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80]
[all …]
Dbasic-arm-instructions-v8.s3 @ RUN: llvm-mc -triple armv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
10 @ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1]
16 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
27 @ CHECK-V8: dmb ishld @ encoding: [0x59,0xf0,0x7f,0xf5]
28 @ CHECK-V8: dmb oshld @ encoding: [0x51,0xf0,0x7f,0xf5]
29 @ CHECK-V8: dmb nshld @ encoding: [0x55,0xf0,0x7f,0xf5]
30 @ CHECK-V8: dmb ld @ encoding: [0x5d,0xf0,0x7f,0xf5]
44 @ CHECK-V8: dsb ishld @ encoding: [0x49,0xf0,0x7f,0xf5]
45 @ CHECK-V8: dsb oshld @ encoding: [0x41,0xf0,0x7f,0xf5]
[all …]
/external/llvm/test/MC/ARM/
Dinvalid-fp-armv8.s1 …N: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V8
11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
[all …]
Dbasic-thumb2-instructions-v8.s3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt #63 @ encoding: [0xbf,0xba]
18 @ CHECK-V8: it pl @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
24 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
33 @ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d]
42 @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80]
[all …]
Dbasic-arm-instructions-v8.s3 @ RUN: llvm-mc -triple armv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
10 @ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1]
16 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
27 @ CHECK-V8: dmb ishld @ encoding: [0x59,0xf0,0x7f,0xf5]
28 @ CHECK-V8: dmb oshld @ encoding: [0x51,0xf0,0x7f,0xf5]
29 @ CHECK-V8: dmb nshld @ encoding: [0x55,0xf0,0x7f,0xf5]
30 @ CHECK-V8: dmb ld @ encoding: [0x5d,0xf0,0x7f,0xf5]
44 @ CHECK-V8: dsb ishld @ encoding: [0x49,0xf0,0x7f,0xf5]
45 @ CHECK-V8: dsb oshld @ encoding: [0x41,0xf0,0x7f,0xf5]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
Dfloat.ll1 ; RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
2 ; RUN: llc -march=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
3 ; RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
7 ; V8-LABEL: test_neg:
8 ; V8: call get_double
9 ; V8-BE: fnegs %f0, %f0
10 ; V8-EL: fnegs %f1, %f1
12 ; V8-UNOPT-LABEL: test_neg:
13 ; V8-UNOPT: fnegs
14 ; V8-UNOPT: ! implicit-def
[all …]
D2011-01-11-CC.ll1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
8 ; V8: addcc
9 ; V8-NOT: subcc
10 ; V8: addx
24 ; V8: test_select_int_icc
25 ; V8: cmp
26 ; V8: {{be|bne}}
39 ; V8: test_select_fp_icc
40 ; V8: cmp
41 ; V8: {{be|bne}}
[all …]
D2011-01-11-Call.ll2 ; RUN: llc -march=sparc <%s | FileCheck %s --check-prefix=V8
5 ; V8-LABEL: test
6 ; V8: save %sp
7 ; V8: call foo
8 ; V8-NEXT: nop
9 ; V8: call bar
10 ; V8-NEXT: nop
11 ; V8: ret
12 ; V8-NEXT: restore
35 ; V8-LABEL: test_tail_call_with_return
[all …]
D2011-01-11-FrameAddr.ll1 ;RUN: llc -march=sparc -show-mc-encoding < %s | FileCheck %s -check-prefix=V8
3 ;RUN: llc -march=sparc -show-mc-encoding -regalloc=basic < %s | FileCheck %s -check-prefix=V8
10 ;V8-LABEL: frameaddr:
11 ;V8: save %sp, -96, %sp
12 ;V8: ret
13 ;V8: restore %g0, %fp, %o0
33 ;V8-LABEL: frameaddr2:
34 ;V8: ta 3 ! encoding: [0x91,0xd0,0x20,0x03]
35 ;V8: ld [%fp+56], {{.+}}
36 ;V8: ld [{{.+}}+56], {{.+}}
[all …]
/external/llvm/test/CodeGen/SPARC/
Dfloat.ll1 ; RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
2 ; RUN: llc -march=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
3 ; RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
7 ; V8-LABEL: test_neg:
8 ; V8: call get_double
9 ; V8-BE: fnegs %f0, %f0
10 ; V8-EL: fnegs %f1, %f1
12 ; V8-UNOPT-LABEL: test_neg:
13 ; V8-UNOPT: fnegs
14 ; V8-UNOPT: ! implicit-def
[all …]
D2011-01-11-CC.ll1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
8 ; V8: addcc
9 ; V8-NOT: subcc
10 ; V8: addx
24 ; V8: test_select_int_icc
25 ; V8: cmp
26 ; V8: {{be|bne}}
39 ; V8: test_select_fp_icc
40 ; V8: cmp
41 ; V8: {{be|bne}}
[all …]
D2011-01-11-Call.ll2 ; RUN: llc -march=sparc <%s | FileCheck %s --check-prefix=V8
5 ; V8-LABEL: test
6 ; V8: save %sp
7 ; V8: call foo
8 ; V8-NEXT: nop
9 ; V8: call bar
10 ; V8-NEXT: nop
11 ; V8: ret
12 ; V8-NEXT: restore
35 ; V8-LABEL: test_tail_call_with_return
[all …]
D2011-01-11-FrameAddr.ll1 ;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
3 ;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
10 ;V8-LABEL: frameaddr:
11 ;V8: save %sp, -96, %sp
12 ;V8: ret
13 ;V8: restore %g0, %fp, %o0
33 ;V8-LABEL: frameaddr2:
34 ;V8: ta 3
35 ;V8: ld [%fp+56], {{.+}}
36 ;V8: ld [{{.+}}+56], {{.+}}
[all …]
/external/v8/infra/mb/
Dmb_config.pyl1 # Copyright 2016 The V8 project authors. All rights reserved.
63 'V8 Linux - builder': 'release_x86_gcmole',
64 'V8 Linux - debug builder': 'debug_x86',
65 'V8 Linux - nosnap builder': 'release_x86_no_snap',
66 'V8 Linux - nosnap debug builder': 'debug_x86_no_snap',
67 'V8 Linux - shared': 'release_x86_shared_verify_heap',
68 'V8 Linux - noi18n - debug': 'debug_x86_no_i18n',
69 'V8 Linux - verify csa': 'release_x86_verify_csa',
71 'V8 Linux64 - builder': 'release_x64',
72 'V8 Linux64 - debug builder': 'debug_x64',
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/SPARC/
D2011-01-11-CC.ll1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
7 ; V8: addcc
8 ; V8-NOT: subcc
9 ; V8: addx
23 ; V8: test_select_int_icc
24 ; V8: subcc
25 ; V8: {{be|bne}}
38 ; V8: test_select_fp_icc
39 ; V8: subcc
40 ; V8: {{be|bne}}
[all …]
D2011-01-11-FrameAddr.ll1 ;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
3 ;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
8 ;V8: frameaddr
9 ;V8: or %g0, %fp, {{.+}}
19 ;V8: frameaddr2
20 ;V8: ta 3
21 ;V8: ld [%fp+56], {{.+}}
22 ;V8: ld [{{.+}}+56], {{.+}}
23 ;V8: ld [{{.+}}+56], {{.+}}
40 ;V8: retaddr
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Darm-and-tst-peephole.ll4 ; RUN: llc -mtriple=thumbv8-eabi -arm-atomic-cfg-tidy=0 %s -o - | FileCheck -check-prefix=V8 %s
43 ; V8-LABEL: %tailrecurse.switch
44 ; V8: cmp
45 ; V8-NEXT: beq
46 ; V8-NEXT: %tailrecurse.switch
47 ; V8: cmp
48 ; V8-NEXT: beq
49 ; V8-NEXT: %tailrecurse.switch
50 ; V8: cmp
51 ; V8-NEXT: beq
[all …]

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