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Searched refs:V8H (Results 1 – 10 of 10) sorted by relevance

/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc620 __ abs(v29.V8H(), v13.V8H()); in GenerateTestSequenceNEON()
628 __ add(v4.V8H(), v2.V8H(), v1.V8H()); in GenerateTestSequenceNEON()
631 __ addhn(v31.V8B(), v12.V8H(), v22.V8H()); in GenerateTestSequenceNEON()
632 __ addhn2(v16.V16B(), v21.V8H(), v20.V8H()); in GenerateTestSequenceNEON()
634 __ addhn2(v31.V8H(), v7.V4S(), v17.V4S()); in GenerateTestSequenceNEON()
642 __ addp(v17.V8H(), v8.V8H(), v12.V8H()); in GenerateTestSequenceNEON()
646 __ addv(h19, v14.V8H()); in GenerateTestSequenceNEON()
655 __ bic(v18.V8H(), 0x98); in GenerateTestSequenceNEON()
667 __ cls(v15.V8H(), v14.V8H()); in GenerateTestSequenceNEON()
673 __ clz(v6.V8H(), v11.V8H()); in GenerateTestSequenceNEON()
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Dtest-cpu-features-aarch64.cc733 TEST_NEON(abs_3, abs(v0.V8H(), v1.V8H()))
738 TEST_NEON(addhn_0, addhn(v0.V8B(), v1.V8H(), v2.V8H()))
741 TEST_NEON(addhn2_0, addhn2(v0.V16B(), v1.V8H(), v2.V8H()))
742 TEST_NEON(addhn2_1, addhn2(v0.V8H(), v1.V4S(), v2.V4S()))
748 TEST_NEON(addp_4, addp(v0.V8H(), v1.V8H(), v2.V8H()))
755 TEST_NEON(addv_3, addv(h0, v1.V8H()))
760 TEST_NEON(add_3, add(v0.V8H(), v1.V8H(), v2.V8H()))
768 TEST_NEON(bic_1, bic(v0.V8H(), 0x3a, 0))
782 TEST_NEON(cls_3, cls(v0.V8H(), v1.V8H()))
788 TEST_NEON(clz_3, clz(v0.V8H(), v1.V8H()))
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Dtest-disasm-aarch64.cc3462 V(V8H(), "8h") \
3471 V(V8H(), "8h", V16B(), "16b") \
3472 V(V4S(), "4s", V8H(), "8h") \
3476 V(V8H(), "8h", V8B(), "8b") \
3481 V(V8H(), "8h", V16B(), "16b") \
3482 V(V4S(), "4s", V8H(), "8h") \
3489 V(V8H(), "8h") \
3495 V(V8H(), "8h") \
3551 COMPARE_MACRO(Ld1(v4.V8H(), v5.V8H(), MemOperand(x18, 32, PostIndex)), in TEST()
3578 COMPARE_MACRO(Ld2(v4.V8H(), v5.V8H(), MemOperand(x18, 32, PostIndex)), in TEST()
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Dtest-assembler-aarch64.cc3871 __ Ld1(v5.V8H(), v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
3917 __ Ld1(v5.V8H(), v6.V8H(), v7.V8H(), MemOperand(x19, 48, PostIndex)); in TEST()
4113 __ Ld2(v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
4155 __ Ld2(v6.V8H(), v7.V8H(), MemOperand(x19, 32, PostIndex)); in TEST()
4378 __ Ld2r(v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
4423 __ Ld2r(v6.V8H(), v7.V8H(), MemOperand(x17, 4, PostIndex)); in TEST()
4556 __ Ld3(v8.V8H(), v9.V8H(), v10.V8H(), MemOperand(x17)); in TEST()
4604 __ Ld3(v8.V8H(), v9.V8H(), v10.V8H(), MemOperand(x19, 48, PostIndex)); in TEST()
4849 __ Ld3r(v9.V8H(), v10.V8H(), v11.V8H(), MemOperand(x17)); in TEST()
4903 __ Ld3r(v9.V8H(), v10.V8H(), v11.V8H(), MemOperand(x17, 6, PostIndex)); in TEST()
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/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc1827 __ Dup(i.OutputSimd128Register().V8H(), i.InputRegister32(0)); in AssembleArchInstruction()
1831 __ Smov(i.OutputRegister32(), i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
1836 VRegister dst = i.OutputSimd128Register().V8H(), in AssembleArchInstruction()
1837 src1 = i.InputSimd128Register(0).V8H(); in AssembleArchInstruction()
1848 __ Shl(i.OutputSimd128Register().V8H(), i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
1853 __ Sshr(i.OutputSimd128Register().V8H(), i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
1868 __ Sqxtn2(dst.V8H(), src1.V4S()); in AssembleArchInstruction()
1881 VRegister dst = i.OutputSimd128Register().V8H(); in AssembleArchInstruction()
1882 __ Cmeq(dst, i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
1883 i.InputSimd128Register(1).V8H()); in AssembleArchInstruction()
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/external/vixl/src/aarch64/
Doperands-aarch64.h369 VRegister V8H() const { return VRegister(code_, kQRegSize, 8); } in V8H() function
Dmacro-assembler-aarch64.cc1034 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff); in Movi32bitHelper()
/external/webrtc/talk/media/testdata/
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/external/v8/src/arm64/
Dmacro-assembler-arm64.cc449 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xFFFF); in Movi32bitHelper()
Dassembler-arm64.h323 VRegister V8H() const { in V8H() function