Home
last modified time | relevance | path

Searched refs:VALIDATE_BUS_ACTIVE (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_pbs.c84 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
97 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
173 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
332 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
347 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
370 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
397 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
458 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
475 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
624 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
[all …]
Dddr3_training_leveling.c39 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_max_cs_get()
231 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling()
297 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_read_leveling()
445 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
603 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
677 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_dynamic_per_bit_read_leveling()
709 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_dynamic_per_bit_read_leveling()
810 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_calc_cs_mask()
953 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_dynamic_write_leveling()
980 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_dynamic_write_leveling()
[all …]
Dddr3_debug.c138 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
149 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
541 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_stability_log()
582 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_stability_log()
703 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_read_adll_value()
737 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_write_adll_value()
768 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in read_phase_value()
796 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in write_leveling_value()
859 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_print_adll()
1240 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, j); in print_adll()
[all …]
Dddr3_training_centralization.c106 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
136 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
353 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
548 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_id); in ddr3_tip_special_rx()
707 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_print_centralization_result()
Dddr3_training_hw_algo.c236 VALIDATE_BUS_ACTIVE in ddr3_tip_vref()
261 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
275 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
603 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_vref()
Dddr3_training_ip_engine.c754 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, pup_cnt); in ddr3_tip_read_training_result()
1162 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1283 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1320 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1350 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1398 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, sybphy_id); in ddr3_tip_ip_training_wrapper()
1465 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_load_phy_values()
1556 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, in ddr3_tip_training_ip_test()
Dddr3_training.c325 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in calc_cs_num()
388 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_index); in hws_ddr3_tip_init_controller()
497 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in hws_ddr3_tip_init_controller()
702 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev2_rank_control()
756 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_rev3_rank_control()
800 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_pad_inv()
1206 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in adll_calibration()
1356 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_freq_set()
1500 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in ddr3_tip_freq_set()
1904 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_num); in ddr3_tip_write_cs_result()
[all …]
Dddr3_training_bist.c573 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
587 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
595 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, subphy); in mv_ddr_dm_vw_get()
Dddr3_init.c131 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_cnt); in mv_ddr_get_memory_size_per_cs_in_bits()
Dddr3_training_ip_flow.h37 #define VALIDATE_BUS_ACTIVE(mask, id) \ macro
Dmv_ddr_plat.c621 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, i); in prfa_read()
1419 VALIDATE_BUS_ACTIVE(tm->bus_act_mask, phy_id); in ddr3_tip_configure_phy()