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Searched refs:VECREDUCE_SMIN (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h825 VECREDUCE_SMAX, VECREDUCE_SMIN, VECREDUCE_UMAX, VECREDUCE_UMIN, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp398 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; in getOperationName()
DLegalizeVectorTypes.cpp1663 case ISD::VECREDUCE_SMIN: in SplitVectorOperand()
1745 case ISD::VECREDUCE_SMIN: CombineOpc = ISD::SMIN; break; in SplitVecOp_VECREDUCE()
DSelectionDAGBuilder.cpp8277 Res = DAG.getNode(ISD::VECREDUCE_SMIN, dl, VT, Op1); in visitVectorReduce()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp700 setOperationAction(ISD::VECREDUCE_SMIN, VT, Custom); in AArch64TargetLowering()
2887 case ISD::VECREDUCE_SMIN: in LowerOperation()
7656 case ISD::VECREDUCE_SMIN: in LowerVECREDUCE()
11266 case ISD::VECREDUCE_SMIN: in ReplaceNodeResults()