Searched refs:VGPR32 (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.h | 33 VGPR32, enumerator
47 unsigned getVGPRNum() const { return Value[VGPR32]; } in getVGPRNum()
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| D | GCNRegPressure.cpp | 92 (STI->getRegSizeInBits(*RC) == 32 ? VGPR32 : VGPR_TUPLE); in getRegKind()
112 case VGPR32: in inc()
122 Value[Kind == SGPR_TUPLE ? SGPR32 : VGPR32] += in inc()
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| D | AMDGPUCallingConv.td | 41 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
72 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 43 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
84 VGPR32, VGPR33, VGPR34, VGPR35, VGPR36, VGPR37, VGPR38, VGPR39,
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | spill-scavenge-offset.ll | 23 …m sideeffect "", "~{VGPR4},~{VGPR8},~{VGPR12},~{VGPR16},~{VGPR20},~{VGPR24},~{VGPR28},~{VGPR32}" ()
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