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Searched refs:VGPU10_OPERAND_4_COMPONENT_MASK_X (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/gallium/drivers/svga/include/
DVGPU10ShaderTokens.h336 #define VGPU10_OPERAND_4_COMPONENT_MASK_X 0x1 macro
341 #define VGPU10_OPERAND_4_COMPONENT_MASK_XY (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
342 #define VGPU10_OPERAND_4_COMPONENT_MASK_XZ (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
343 #define VGPU10_OPERAND_4_COMPONENT_MASK_XW (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_vgpu10.c940 STATIC_ASSERT(TGSI_WRITEMASK_X == VGPU10_OPERAND_4_COMPONENT_MASK_X); in emit_dst_register()
2196 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()
2208 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()
3293 unsigned writemask = VGPU10_OPERAND_4_COMPONENT_MASK_X << comp; in emit_clip_distance_from_vpos()
3335 unsigned writemask = VGPU10_OPERAND_4_COMPONENT_MASK_X << comp; in emit_clip_vertex_instructions()