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Searched refs:VSRL (Results 1 – 21 of 21) sorted by relevance

/external/boringssl/src/ssl/test/runner/poly1305/
Dsum_vmsl_s390x.s168 VSRL t8, t0, t0 \ // h0 bit shift
169 VSRL t8, t1, t1 \ // h2 bit shift
170 VSRL t11, t2, t2 \ // h2 bit shift
171 VSRL t8, t3, t3 \ // h3 bit shift
172 VSRL t8, t4, t4 \ // h4 bit shift
174 VSRL t11, t5, t5 \ // h5 bit shift
223 VSRL t4, t0, t0 \
224 VSRL t4, t1, t1 \
225 VSRL t7, t2, t2 \
238 VSRL t4, t0, t0 \
[all …]
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h314 X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
315 X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
316 X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1296 X86_INTRINSIC_DATA(avx512_mask_psrl_d, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1297 X86_INTRINSIC_DATA(avx512_mask_psrl_d_128, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1298 X86_INTRINSIC_DATA(avx512_mask_psrl_d_256, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1302 X86_INTRINSIC_DATA(avx512_mask_psrl_q, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1303 X86_INTRINSIC_DATA(avx512_mask_psrl_q_128, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1304 X86_INTRINSIC_DATA(avx512_mask_psrl_q_256, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
1308 X86_INTRINSIC_DATA(avx512_mask_psrl_w_128, INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
[all …]
DX86ISelLowering.h311 VSHL, VSRL, VSRA, enumerator
DX86InstrFragmentsSIMD.td208 def X86vsrl : SDNode<"X86ISD::VSRL",
DX86ISelLowering.cpp17128 case X86ISD::VSRLI: Opc = X86ISD::VSRL; break; in getTargetVShiftNode()
19935 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRL : X86ISD::VSRA; in LowerScalarVariableShift()
20202 Opc = X86ISD::VSRL; in LowerShift()
22188 case X86ISD::VSRL: return "X86ISD::VSRL"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h362 X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
363 X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
364 X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1024 X86_INTRINSIC_DATA(avx512_psrl_d_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1025 X86_INTRINSIC_DATA(avx512_psrl_q_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1026 X86_INTRINSIC_DATA(avx512_psrl_w_512, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1206 X86_INTRINSIC_DATA(sse2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1207 X86_INTRINSIC_DATA(sse2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
1208 X86_INTRINSIC_DATA(sse2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
DX86ISelLowering.h318 VSHL, VSRL, VSRA, enumerator
DX86InstrFragmentsSIMD.td188 def X86vsrl : SDNode<"X86ISD::VSRL", X86vshiftuniform>;
DX86ISelLowering.cpp20243 case X86ISD::VSRLI: Opc = X86ISD::VSRL; break; in getTargetVShiftNode()
23297 (Opcode == ISD::SRL) ? X86ISD::VSRL : X86ISD::VSRA; in LowerScalarVariableShift()
23553 Opc = X86ISD::VSRL; in LowerShift()
26013 case X86ISD::VSRL: return "X86ISD::VSRL"; in getTargetNodeName()
/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td74 // VSRL - One of the 32 128-bit VSX registers that overlap with the scalar
76 class VSRL<FPR SubReg, string n> : PPCReg<n> {
138 def VSL#Index : VSRL<!cast<FPR>("F"#Index), "vs"#Index>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td80 // VSRL - One of the 32 128-bit VSX registers that overlap with the scalar
82 class VSRL<FPR SubReg, string n> : PPCReg<n> {
144 def VSL#Index : VSRL<!cast<FPR>("F"#Index), "vs"#Index>,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h224 VSHL, VSRL, enumerator
DX86InstrFragmentsSIMD.td92 def X86vshr : SDNode<"X86ISD::VSRL", SDTIntShiftOp>;
DX86ISelLowering.cpp4888 unsigned Opc = isLeft ? X86ISD::VSHL : X86ISD::VSRL; in getVShift()
10686 case X86ISD::VSRL: return "X86ISD::VSRL"; in getTargetNodeName()
DX86GenDAGISel.inc46040 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VSRL),// ->96215
/external/v8/src/s390/
Dconstants-s390.h540 V(vsrl, VSRL, 0xE77C) /* type = VRR_C VECTOR SHIFT RIGHT LOGICAL */ \
/external/llvm/lib/Target/SystemZ/
DSystemZInstrVector.td605 def VSRL : BinaryVRRc<"vsrl", 0xE77C, int_s390_vsrl, v128b, v128b>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrVector.td717 def VSRL : BinaryVRRc<"vsrl", 0xE77C, int_s390_vsrl, v128b, v128b>;
/external/llvm/test/CodeGen/SystemZ/
Dvec-intrinsics.ll1528 ; VSRL.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-intrinsics-01.ll1528 ; VSRL.
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc11904 // FastEmit functions for X86ISD::VSRL.
12044 case X86ISD::VSRL: return fastEmit_X86ISD_VSRL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);