/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 317 X86_INTRINSIC_DATA(avx2_psrli_d, VSHIFT, X86ISD::VSRLI, 0), 318 X86_INTRINSIC_DATA(avx2_psrli_q, VSHIFT, X86ISD::VSRLI, 0), 319 X86_INTRINSIC_DATA(avx2_psrli_w, VSHIFT, X86ISD::VSRLI, 0), 1299 X86_INTRINSIC_DATA(avx512_mask_psrl_di_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1300 X86_INTRINSIC_DATA(avx512_mask_psrl_di_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1301 X86_INTRINSIC_DATA(avx512_mask_psrl_di_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1305 X86_INTRINSIC_DATA(avx512_mask_psrl_qi_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1306 X86_INTRINSIC_DATA(avx512_mask_psrl_qi_256, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1307 X86_INTRINSIC_DATA(avx512_mask_psrl_qi_512, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), 1311 X86_INTRINSIC_DATA(avx512_mask_psrl_wi_128, INTR_TYPE_2OP_IMM8_MASK, X86ISD::VSRLI, 0), [all …]
|
D | X86ISelLowering.h | 319 VSHLI, VSRLI, VSRAI, enumerator
|
D | X86InstrFragmentsSIMD.td | 218 def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
|
D | X86ISelLowering.cpp | 4616 Vec = ShiftRight ? DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, in insert1BitVector() 4625 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 4643 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 7879 : (ByteShift ? X86ISD::VSRLDQ : X86ISD::VSRLI); in lowerVectorShuffleAsShift() 12414 Vec = DAG.getNode(X86ISD::VSRLI, dl, VecVT, Vec, in ExtractBitFromMaskVector() 17053 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode() 17078 case X86ISD::VSRLI: in getTargetVShiftByConstNode() 17128 case X86ISD::VSRLI: Opc = X86ISD::VSRL; break; in getTargetVShiftNode() 19418 SDValue Ahi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, A, 32, DAG); in LowerMUL() 19419 SDValue Bhi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, B, 32, DAG); in LowerMUL() [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 365 X86_INTRINSIC_DATA(avx2_psrli_d, VSHIFT, X86ISD::VSRLI, 0), 366 X86_INTRINSIC_DATA(avx2_psrli_q, VSHIFT, X86ISD::VSRLI, 0), 367 X86_INTRINSIC_DATA(avx2_psrli_w, VSHIFT, X86ISD::VSRLI, 0), 1027 X86_INTRINSIC_DATA(avx512_psrli_d_512, VSHIFT, X86ISD::VSRLI, 0), 1028 X86_INTRINSIC_DATA(avx512_psrli_q_512, VSHIFT, X86ISD::VSRLI, 0), 1029 X86_INTRINSIC_DATA(avx512_psrli_w_512, VSHIFT, X86ISD::VSRLI, 0), 1209 X86_INTRINSIC_DATA(sse2_psrli_d, VSHIFT, X86ISD::VSRLI, 0), 1210 X86_INTRINSIC_DATA(sse2_psrli_q, VSHIFT, X86ISD::VSRLI, 0), 1211 X86_INTRINSIC_DATA(sse2_psrli_w, VSHIFT, X86ISD::VSRLI, 0),
|
D | X86ISelLowering.h | 326 VSHLI, VSRLI, VSRAI, enumerator
|
D | X86InstrFragmentsSIMD.td | 197 def X86vsrli : SDNode<"X86ISD::VSRLI", X86vshiftimm>;
|
D | X86ISelLowering.cpp | 6305 case X86ISD::VSRLI: { in getFauxShuffleMask() 10191 : (ByteShift ? X86ISD::VSRLDQ : X86ISD::VSRLI); in matchVectorShuffleAsShift() 20168 assert((Opc == X86ISD::VSHLI || Opc == X86ISD::VSRLI || Opc == X86ISD::VSRAI) in getTargetVShiftByConstNode() 20192 case X86ISD::VSRLI: in getTargetVShiftByConstNode() 20243 case X86ISD::VSRLI: Opc = X86ISD::VSRL; break; in getTargetVShiftNode() 22685 SDValue Bhi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, B, 32, DAG); in LowerMUL() 22691 SDValue Ahi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, A, 32, DAG); in LowerMUL() 23047 (Op.getOpcode() == ISD::SRL) ? X86ISD::VSRLI : X86ISD::VSRAI; in LowerScalarImmediateShift() 23078 getTargetVShiftByConstNode(X86ISD::VSRLI, dl, VT, R, ShiftAmt, DAG); in LowerScalarImmediateShift() 23140 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, in LowerScalarImmediateShift() [all …]
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenFastISel.inc | 14270 // FastEmit functions for X86ISD::VSRLI. 14457 case X86ISD::VSRLI: return fastEmit_X86ISD_VSRLI_ri(VT, RetVT, Op0, Op0IsKill, imm1);
|