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Searched refs:VT0 (Results 1 – 25 of 34) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPURewriteOutArguments.cpp211 VectorType *VT0 = dyn_cast<VectorType>(Ty0); in isVec3ToVec4Shuffle() local
213 if (!VT0 || !VT1) in isVec3ToVec4Shuffle()
216 if (VT0->getNumElements() != 3 || in isVec3ToVec4Shuffle()
220 return DL->getTypeSizeInBits(VT0->getElementType()) == in isVec3ToVec4Shuffle()
/external/kernel-headers/original/uapi/asm-generic/
Dtermbits.h106 #define VT0 0000000 macro
/external/kernel-headers/original/uapi/asm-mips/asm/
Dtermbits.h126 #define VT0 0000000 macro
/external/python/cpython2/Modules/
Dtermios.c480 #ifdef VT0
481 {"VT0", VT0},
/external/python/cpython3/Modules/
Dtermios.c508 #ifdef VT0
509 {"VT0", VT0},
/external/python/cpython2/Lib/plat-irix6/
DIOCTL.py120 VT0 = 0 variable
/external/python/cpython2/Lib/plat-irix5/
DIOCTL.py120 VT0 = 0 variable
/external/toybox/toys/pending/
Dstty.c107 { "bs0", BS0, BSDLY }, { "bs1", BS1, BSDLY }, { "vt0", VT0, VTDLY },
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp3243 EVT VT0 = getSETCCWidenedResultTy(SETCC0); in WidenVSELECTAndMask() local
3245 unsigned ScalarBits0 = VT0.getScalarSizeInBits(); in WidenVSELECTAndMask()
3253 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTAndMask()
3254 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTAndMask()
3263 MaskVT = VT0; in WidenVSELECTAndMask()
3266 SETCC0 = convertMask(SETCC0, VT0, MaskVT); in WidenVSELECTAndMask()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp75 for (MVT VT0 : MVT::vector_valuetypes()) { in MipsSETargetLowering() local
77 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
78 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
79 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
80 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp49 for (MVT VT0 : MVT::vector_valuetypes()) { in MipsSETargetLowering() local
51 setTruncStoreAction(VT0, VT1, Expand); in MipsSETargetLowering()
52 setLoadExtAction(ISD::SEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
53 setLoadExtAction(ISD::ZEXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
54 setLoadExtAction(ISD::EXTLOAD, VT0, VT1, Expand); in MipsSETargetLowering()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp3744 EVT VT0 = N0.getValueType(); in visitSELECT() local
3760 (VT0 == MVT::i1 || in visitSELECT()
3761 (VT0.isInteger() && in visitSELECT()
3765 if (VT == VT0) in visitSELECT()
3766 return DAG.getNode(ISD::XOR, N->getDebugLoc(), VT0, in visitSELECT()
3767 N0, DAG.getConstant(1, VT0)); in visitSELECT()
3768 XORNode = DAG.getNode(ISD::XOR, N0.getDebugLoc(), VT0, in visitSELECT()
3769 N0, DAG.getConstant(1, VT0)); in visitSELECT()
3771 if (VT.bitsGT(VT0)) in visitSELECT()
3776 if (VT == VT0 && VT == MVT::i1 && N1C && N1C->isNullValue()) { in visitSELECT()
[all …]
/external/syzkaller/vendor/golang.org/x/sys/unix/
Dzerrors_solaris_amd64.go1125 VT0 = 0x0 const
Dzerrors_darwin_386.go1463 VT0 = 0x0 const
Dzerrors_darwin_arm64.go1463 VT0 = 0x0 const
Dzerrors_darwin_amd64.go1463 VT0 = 0x0 const
Dzerrors_darwin_arm.go1463 VT0 = 0x0 const
Dzerrors_linux_sparc64.go1771 VT0 = 0x0 const
Dzerrors_linux_mipsle.go2139 VT0 = 0x0 const
Dzerrors_linux_s390x.go2196 VT0 = 0x0 const
Dzerrors_linux_arm.go2142 VT0 = 0x0 const
Dzerrors_linux_ppc64le.go2196 VT0 = 0x0 const
Dzerrors_linux_mips64.go2139 VT0 = 0x0 const
Dzerrors_linux_ppc64.go2196 VT0 = 0x0 const
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp5075 EVT VT0 = N0.getValueType(); in visitSELECT() local
5098 (VT0 == MVT::i1 || (VT0.isInteger() && in visitSELECT()
5105 if (VT == VT0) { in visitSELECT()
5107 return DAG.getNode(ISD::XOR, DL, VT0, in visitSELECT()
5108 N0, DAG.getConstant(1, DL, VT0)); in visitSELECT()
5111 XORNode = DAG.getNode(ISD::XOR, DL0, VT0, in visitSELECT()
5112 N0, DAG.getConstant(1, DL0, VT0)); in visitSELECT()
5114 if (VT.bitsGT(VT0)) in visitSELECT()
5119 if (VT == VT0 && VT == MVT::i1 && isNullConstant(N1)) { in visitSELECT()
5125 if (VT == VT0 && VT == MVT::i1 && isOneConstant(N2)) { in visitSELECT()
[all …]

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