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Searched refs:VZERO (Results 1 – 16 of 16) sorted by relevance

/external/boringssl/src/ssl/test/runner/poly1305/
Dsum_vmsl_s390x.s316 VZERO t0 \
342 VZERO V0 // c
353 VZERO T_2 // limbs for r
354 VZERO T_3
355 VZERO T_4
363 VZERO T_5
364 VZERO T_6
376 VZERO H0_0
377 VZERO H1_0
378 VZERO H2_0
[all …]
Dsum_s390x.s172 VZERO t0 \
239 VZERO H_0
240 VZERO H_1
241 VZERO H_2
242 VZERO H_3
243 VZERO H_4
266 VZERO T_0
336 VZERO H_0
337 VZERO H_1
338 VZERO H_2
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Duse-sgpr-multiple-times.ll245 ; GCN-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0{{$}}
249 …+:[0-9]+\]]], [[SGPR0]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, v{{\[}}[[VZERO]]:[[VK0_SUB1]]{{\]…
253 …+:[0-9]+\]]], [[SGPR0]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, v{{\[}}[[VZERO]]:[[VK1_SUB1]]{{\]…
Dsub.i16.ll90 ; VI: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0
92 ; VI: buffer_store_dwordx2 v{{\[}}[[ADD]]:[[VZERO]]{{\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}
/external/llvm/test/CodeGen/AMDGPU/
Duse-sgpr-multiple-times.ll249 ; GCN-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0{{$}}
253 …+:[0-9]+\]]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, [[SGPR0]], v{{\[}}[[VZERO]]:[[VK0_SUB1]]{{\]…
257 …+:[0-9]+\]]], [[SGPR0]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, v{{\[}}[[VZERO]]:[[VK1_SUB1]]{{\]…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.h82 VZERO, enumerator
DHexagonPatternsHVX.td38 def HexagonVZERO: SDNode<"HexagonISD::VZERO", SDTVecLeaf>;
DHexagonISelLowering.cpp1724 case HexagonISD::VZERO: return "HexagonISD::VZERO"; in getTargetNodeName()
2490 return DAG.getNode(HexagonISD::VZERO, dl, Ty); in getZero()
DHexagonISelDAGToDAGHVX.cpp940 case HexagonISD::VZERO: in selectVectorConstants()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrVector.td62 def VZERO : InherentVRIa<"vzero", 0xE744, 0>;
1449 def : Pat<(f128 fpimm0), (VZERO)>;
1450 def : Pat<(f128 fpimmneg0), (WFLNXB (VZERO))>;
DSystemZScheduleZ13.td1174 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
DSystemZScheduleZ14.td1191 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
/external/llvm/lib/Target/SystemZ/
DSystemZInstrVector.td58 def VZERO : InherentVRIa<"vzero", 0xE744, 0>;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrSSE.td6750 // VZERO - Zero YMM registers
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrSSE.td7411 // VZERO - Zero YMM registers
/external/llvm/lib/Target/X86/
DX86InstrSSE.td8157 // VZERO - Zero YMM registers