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Searched refs:VZEXT_LOAD (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h332 VZEXT_LOAD, enumerator
DX86InstrFragmentsSIMD.td89 def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
DX86ISelLowering.cpp5035 DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, 2, MVT::i64, in EltsFromConsecutiveLoads()
10684 case X86ISD::VZEXT_LOAD: return "X86ISD::VZEXT_LOAD"; in getTargetNodeName()
14029 if (Op.getOpcode() == X86ISD::VZEXT_LOAD && in PerformVZEXT_MOVLCombine()
DX86GenDAGISel.inc12559 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->26207
12673 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->26435
12787 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->26663
12901 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->26891
13015 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->27119
13129 /*SwitchOpcode*/ 48, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->27347
40998 /*85575*/ OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_LOAD),
42240 /*SwitchOpcode*/ 121, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->88408
44362 /*92644*/ OPC_CheckOpcode, TARGET_VAL(X86ISD::VZEXT_LOAD),
44445 /*SwitchOpcode*/ 29, TARGET_VAL(X86ISD::VZEXT_LOAD),// ->92844
/external/llvm/lib/Target/X86/
DX86ISelLowering.h554 VZEXT_LOAD, enumerator
DX86InstrFragmentsSIMD.td117 def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
DX86ISelLowering.cpp5698 DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, VecSVT, in EltsFromConsecutiveLoads()
22173 case X86ISD::VZEXT_LOAD: return "X86ISD::VZEXT_LOAD"; in getTargetNodeName()
24715 DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, dl, Tys, Ops, in combineShuffle256()
29949 if (Op.getOpcode() == X86ISD::VZEXT_LOAD && in combineVZextMovl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.h594 VZEXT_LOAD, enumerator
DX86InstrFragmentsSIMD.td103 def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
DX86ISelDAGToDAG.cpp1778 if (N.getOpcode() == X86ISD::VZEXT_LOAD) { in selectScalarSSELoad()
DX86ISelLowering.cpp6925 DAG.getMemIntrinsicNode(X86ISD::VZEXT_LOAD, DL, Tys, Ops, VecSVT, in EltsFromConsecutiveLoads()
25994 case X86ISD::VZEXT_LOAD: return "X86ISD::VZEXT_LOAD"; in getTargetNodeName()
29737 if (V1.getOpcode() == X86ISD::VZEXT_LOAD && in combineX86ShuffleChain()