| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 40 unsigned ValueReg, unsigned Address,
46 unsigned ValueReg, unsigned Address,
245 unsigned ValueReg, unsigned Address,
253 unsigned ValueReg, unsigned Address,
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| D | R600InstrInfo.cpp | 1135 unsigned ValueReg, unsigned Address, in buildIndirectWrite() argument
1137 return buildIndirectWrite(MBB, I, ValueReg, Address, OffsetReg, 0); in buildIndirectWrite()
1142 unsigned ValueReg, unsigned Address, in buildIndirectWrite() argument
1158 AddrReg, ValueReg) in buildIndirectWrite()
1167 unsigned ValueReg, unsigned Address, in buildIndirectRead() argument
1169 return buildIndirectRead(MBB, I, ValueReg, Address, OffsetReg, 0); in buildIndirectRead()
1174 unsigned ValueReg, unsigned Address, in buildIndirectRead() argument
1190 ValueReg, in buildIndirectRead()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 51 unsigned ValueReg, unsigned Address,
57 unsigned ValueReg, unsigned Address,
247 unsigned ValueReg, unsigned Address,
255 unsigned ValueReg, unsigned Address,
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| D | R600InstrInfo.cpp | 1116 unsigned ValueReg, unsigned Address, in buildIndirectWrite() argument
1118 return buildIndirectWrite(MBB, I, ValueReg, Address, OffsetReg, 0); in buildIndirectWrite()
1123 unsigned ValueReg, unsigned Address, in buildIndirectWrite() argument
1139 AddrReg, ValueReg) in buildIndirectWrite()
1148 unsigned ValueReg, unsigned Address, in buildIndirectRead() argument
1150 return buildIndirectRead(MBB, I, ValueReg, Address, OffsetReg, 0); in buildIndirectRead()
1155 unsigned ValueReg, unsigned Address, in buildIndirectRead() argument
1171 ValueReg, in buildIndirectRead()
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| D | SIRegisterInfo.cpp | 518 unsigned ValueReg, in buildSpillLoadStore() argument
539 const TargetRegisterClass *RC = getRegClassForReg(MF->getRegInfo(), ValueReg); in buildSpillLoadStore()
586 ValueReg : getSubReg(ValueReg, getSubRegFromChannel(i)); in buildSpillLoadStore()
612 MIB.addReg(ValueReg, RegState::Implicit | SrcDstRegState); in buildSpillLoadStore()
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| D | SIRegisterInfo.h | 235 unsigned ValueReg,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 1219 unsigned ValueReg = getRegForValue(Store->getValueOperand()); in selectStore() local
1220 if (ValueReg == 0) in selectStore()
1223 ValueReg = maskI1Value(ValueReg, Store->getValueOperand()); in selectStore()
1229 MIB.addReg(ValueReg); in selectStore()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 1070 unsigned ValueReg = getRegForValue(Store->getValueOperand()); in selectStore() local
1072 ValueReg = maskI1Value(ValueReg, Store->getValueOperand()); in selectStore()
1080 MIB.addReg(ValueReg); in selectStore()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9921 unsigned ValueReg = SReg; in EmitPartwordAtomicBinary() local
9924 ValueReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
9925 BuildMI(BB, dl, TII->get(PPC::SRW), ValueReg) in EmitPartwordAtomicBinary()
9929 .addReg(ValueReg); in EmitPartwordAtomicBinary()
9930 ValueReg = ValueSReg; in EmitPartwordAtomicBinary()
9934 .addReg(CmpReg).addReg(ValueReg); in EmitPartwordAtomicBinary()
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