| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 167 SmallVector<EVT, 4> ValueVTs; in set() local
168 ComputeValueVTs(TLI, PN->getType(), ValueVTs); in set()
169 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) { in set()
170 EVT VT = ValueVTs[vti]; in set()
220 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
221 ComputeValueVTs(TLI, Ty, ValueVTs); in CreateRegs()
224 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
225 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
267 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
268 ComputeValueVTs(TLI, Ty, ValueVTs); in ComputePHILiveOutRegInfo()
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| D | SelectionDAGBuilder.cpp | 555 SmallVector<EVT, 4> ValueVTs; member
578 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {} in RegsForValue()
582 ComputeValueVTs(tli, Ty, ValueVTs); in RegsForValue()
584 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in RegsForValue()
585 EVT ValueVT = ValueVTs[Value]; in RegsForValue()
597 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in areValueTypesLegal()
607 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
646 if (ValueVTs.empty()) in getCopyFromRegs()
652 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
654 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
[all …]
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| D | TargetLowering.cpp | 1006 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1007 ComputeValueVTs(TLI, ReturnType, ValueVTs); in GetReturnInfo()
1008 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1013 EVT VT = ValueVTs[j]; in GetReturnInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 280 SmallVector<EVT, 4> ValueVTs; in set() local
281 ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs); in set()
282 for (EVT VT : ValueVTs) { in set()
370 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
371 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in CreateRegs()
374 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
375 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
416 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
417 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in ComputePHILiveOutRegInfo()
418 assert(ValueVTs.size() == 1 && in ComputePHILiveOutRegInfo()
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| D | SelectionDAGBuilder.cpp | 748 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs), in RegsForValue()
754 ComputeValueVTs(TLI, DL, Ty, ValueVTs); in RegsForValue()
758 for (EVT ValueVT : ValueVTs) { in RegsForValue()
780 if (ValueVTs.empty()) in getCopyFromRegs()
786 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
788 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
790 EVT ValueVT = ValueVTs[Value]; in getCopyFromRegs()
859 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
872 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyToRegs()
946 assert(Regs.size() == RegVTs.size() && Regs.size() == ValueVTs.size() && in AddInlineAsmOperands()
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| D | SelectionDAGBuilder.h | 996 SmallVector<EVT, 4> ValueVTs; member
1033 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
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| D | LegalizeVectorOps.cpp | 1148 EVT ValueVTs[] = {EltVT, MVT::Other}; in ExpandStrictFPOp() local
1174 SDValue ScalarOp = DAG.getNode(Op->getOpcode(), dl, ValueVTs, Opers); in ExpandStrictFPOp()
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| D | LegalizeIntegerTypes.cpp | 520 EVT ValueVTs[] = { N->getValueType(0), NVT }; in PromoteIntRes_Overflow() local
528 DAG.getVTList(ValueVTs), makeArrayRef(Ops, NumOps)); in PromoteIntRes_Overflow()
783 EVT ValueVTs[] = {LHS.getValueType(), N->getValueType(1)}; in PromoteIntRes_ADDSUBCARRY() local
786 SDValue Res = DAG.getNode(N->getOpcode(), SDLoc(N), DAG.getVTList(ValueVTs), in PromoteIntRes_ADDSUBCARRY()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 298 SmallVector<EVT, 4> ValueVTs; in set() local
299 ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs); in set()
300 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) { in set()
301 EVT VT = ValueVTs[vti]; in set()
379 SmallVector<EVT, 4> ValueVTs; in CreateRegs() local
380 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in CreateRegs()
383 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) { in CreateRegs()
384 EVT ValueVT = ValueVTs[Value]; in CreateRegs()
426 SmallVector<EVT, 1> ValueVTs; in ComputePHILiveOutRegInfo() local
427 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs); in ComputePHILiveOutRegInfo()
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| D | SelectionDAGBuilder.cpp | 620 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {} in RegsForValue()
624 ComputeValueVTs(TLI, DL, Ty, ValueVTs); in RegsForValue()
626 for (EVT ValueVT : ValueVTs) { in RegsForValue()
645 if (ValueVTs.empty()) in getCopyFromRegs()
651 SmallVector<SDValue, 4> Values(ValueVTs.size()); in getCopyFromRegs()
653 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyFromRegs()
655 EVT ValueVT = ValueVTs[Value]; in getCopyFromRegs()
738 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
755 for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) { in getCopyToRegs()
756 EVT ValueVT = ValueVTs[Value]; in getCopyToRegs()
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| D | SelectionDAGBuilder.h | 959 SmallVector<EVT, 4> ValueVTs; member
987 ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end()); in append()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.cpp | 31 Type *Ty, SmallVectorImpl<MVT> &ValueVTs) { in ComputeLegalValueVTs() argument
42 ValueVTs.push_back(RegisterVT); in ComputeLegalValueVTs()
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| D | WebAssemblyMachineFunctionInfo.h | 119 Type *Ty, SmallVectorImpl<MVT> &ValueVTs);
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 76 SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
86 ComputeValueVTs(TLI, *EI, ValueVTs, Offsets, in ComputeValueVTs()
95 ComputeValueVTs(TLI, EltTy, ValueVTs, Offsets, in ComputeValueVTs()
103 ValueVTs.push_back(TLI.getValueType(Ty)); in ComputeValueVTs()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | Analysis.h | 55 SmallVectorImpl<EVT> &ValueVTs,
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 86 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
96 ComputeValueVTs(TLI, DL, *EI, ValueVTs, Offsets, in ComputeValueVTs()
105 ComputeValueVTs(TLI, DL, EltTy, ValueVTs, Offsets, in ComputeValueVTs()
113 ValueVTs.push_back(TLI.getValueType(DL, Ty)); in ComputeValueVTs()
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| D | TargetLoweringBase.cpp | 1572 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1573 ComputeValueVTs(TLI, DL, ReturnType, ValueVTs); in GetReturnInfo()
1574 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1578 EVT VT = ValueVTs[j]; in GetReturnInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 85 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputeValueVTs() argument
95 ComputeValueVTs(TLI, DL, *EI, ValueVTs, Offsets, in ComputeValueVTs()
104 ComputeValueVTs(TLI, DL, EltTy, ValueVTs, Offsets, in ComputeValueVTs()
112 ValueVTs.push_back(TLI.getValueType(DL, Ty)); in ComputeValueVTs()
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| D | TargetLoweringBase.cpp | 1344 SmallVector<EVT, 4> ValueVTs; in GetReturnInfo() local
1345 ComputeValueVTs(TLI, DL, ReturnType, ValueVTs); in GetReturnInfo()
1346 unsigned NumValues = ValueVTs.size(); in GetReturnInfo()
1350 EVT VT = ValueVTs[j]; in GetReturnInfo()
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| /external/llvm/include/llvm/CodeGen/ |
| D | Analysis.h | 73 SmallVectorImpl<EVT> &ValueVTs,
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 129 Type *Ty, SmallVectorImpl<MVT> &ValueVTs) { in ComputeLegalValueVTs() argument
140 ValueVTs.push_back(RegisterVT); in ComputeLegalValueVTs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | Analysis.h | 73 SmallVectorImpl<EVT> &ValueVTs,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 164 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputePTXValueVTs() argument
172 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
173 ValueVTs.push_back(EVT(MVT::i64)); in ComputePTXValueVTs()
200 ValueVTs.push_back(EltVT); in ComputePTXValueVTs()
205 ValueVTs.push_back(VT); in ComputePTXValueVTs()
223 unsigned Idx, uint32_t AccessSize, const SmallVectorImpl<EVT> &ValueVTs, in CanMergeParamLoadStoresStartingAt() argument
234 EVT EltVT = ValueVTs[Idx]; in CanMergeParamLoadStoresStartingAt()
247 if (Idx + NumElts > ValueVTs.size()) in CanMergeParamLoadStoresStartingAt()
256 if (ValueVTs[j] != EltVT) in CanMergeParamLoadStoresStartingAt()
286 VectorizePTXValueVTs(const SmallVectorImpl<EVT> &ValueVTs, in VectorizePTXValueVTs() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 935 SmallVector<EVT, 16> ValueVTs; in analyzeFormalArgumentsCompute() local
937 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset); in analyzeFormalArgumentsCompute()
939 for (unsigned Value = 0, NumValues = ValueVTs.size(); in analyzeFormalArgumentsCompute()
943 EVT ArgVT = ValueVTs[Value]; in analyzeFormalArgumentsCompute()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 84 Type *Ty, SmallVectorImpl<EVT> &ValueVTs, in ComputePTXValueVTs() argument
96 ValueVTs.push_back(VT.getVectorElementType()); in ComputePTXValueVTs()
101 ValueVTs.push_back(VT); in ComputePTXValueVTs()
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