| /external/cldr/tools/java/org/unicode/cldr/util/ |
| D | LocaleIDParser.java | 187 Language, Script, Region, Variants, Other enumConstant
199 if (getVariants().length != 0) result.add(Level.Variants); in getLevels()
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| /external/cldr/tools/java/org/unicode/cldr/icu/ |
| D | ldml2icu_dir_mapping.txt | 12 /Variants/ ; lang
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 4229 for (const auto &Variants : ChildVariants) in CombineChildVariants() local
4230 if (Variants.empty()) in CombineChildVariants()
4426 std::vector<std::vector<TreePatternNodePtr>> Variants; in GenerateVariantsOf() local
4427 Variants.push_back(std::move(ChildVariants[0])); // Intrinsic id. in GenerateVariantsOf()
4428 Variants.push_back(std::move(ChildVariants[2])); in GenerateVariantsOf()
4429 Variants.push_back(std::move(ChildVariants[1])); in GenerateVariantsOf()
4431 Variants.push_back(std::move(ChildVariants[i])); in GenerateVariantsOf()
4432 CombineChildVariants(N, Variants, OutVariants, CDP, DepVars); in GenerateVariantsOf()
4434 std::vector<std::vector<TreePatternNodePtr>> Variants; in GenerateVariantsOf() local
4435 Variants.push_back(std::move(ChildVariants[1])); in GenerateVariantsOf()
[all …]
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| D | CodeGenSchedule.cpp | 1096 RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in mutuallyExclusive() local
1097 if (any_of(Variants, [PredDef](const Record *R) { in mutuallyExclusive()
1153 std::vector<TransVariant> Variants; in getIntersectingVariants() local
1163 Variants.emplace_back(VarDef, SchedRW.Index, VarProcIdx, 0); in getIntersectingVariants()
1183 Variants.emplace_back(VD, AliasRW.Index, AliasProcIdx, 0); in getIntersectingVariants()
1186 Variants.emplace_back(AliasRW.TheDef, SchedRW.Index, AliasProcIdx, 0); in getIntersectingVariants()
1190 for (TransVariant &Variant : Variants) { in getIntersectingVariants()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 3207 std::vector<std::vector<TreePatternNode*> > Variants; in GenerateVariantsOf() local
3208 Variants.push_back(ChildVariants[0]); // Intrinsic id. in GenerateVariantsOf()
3209 Variants.push_back(ChildVariants[2]); in GenerateVariantsOf()
3210 Variants.push_back(ChildVariants[1]); in GenerateVariantsOf()
3212 Variants.push_back(ChildVariants[i]); in GenerateVariantsOf()
3213 CombineChildVariants(N, Variants, OutVariants, CDP, DepVars); in GenerateVariantsOf()
3237 std::vector<TreePatternNode*> Variants; in GenerateVariants() local
3242 GenerateVariantsOf(PatternsToMatch[i].getSrcPattern(), Variants, *this, in GenerateVariants()
3245 assert(!Variants.empty() && "Must create at least original variant!"); in GenerateVariants()
3246 Variants.erase(Variants.begin()); // Remove the original pattern. in GenerateVariants()
[all …]
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| /external/icu/icu4c/source/data/lang/ |
| D | zh_Hant_HK.txt | 124 Variants{
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| D | se.txt | 149 Variants{
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| D | qu.txt | 141 Variants{
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| D | hy.txt | 619 Variants{
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| D | brx.txt | 586 Variants{
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| D | ks.txt | 587 Variants{
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| D | my.txt | 570 Variants{
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| D | bs_Cyrl.txt | 670 Variants{
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| D | he.txt | 774 Variants{
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| D | fur.txt | 285 Variants{
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| D | ne.txt | 797 Variants{
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| D | sr.txt | 822 Variants{
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 3566 for (const auto &Variants : ChildVariants) in CombineChildVariants() local
3567 if (Variants.empty()) in CombineChildVariants()
3764 std::vector<std::vector<TreePatternNode*> > Variants; in GenerateVariantsOf() local
3765 Variants.push_back(ChildVariants[0]); // Intrinsic id. in GenerateVariantsOf()
3766 Variants.push_back(ChildVariants[2]); in GenerateVariantsOf()
3767 Variants.push_back(ChildVariants[1]); in GenerateVariantsOf()
3769 Variants.push_back(ChildVariants[i]); in GenerateVariantsOf()
3770 CombineChildVariants(N, Variants, OutVariants, CDP, DepVars); in GenerateVariantsOf()
3794 std::vector<TreePatternNode*> Variants; in GenerateVariants() local
3799 GenerateVariantsOf(PatternsToMatch[i].getSrcPattern(), Variants, *this, in GenerateVariants()
[all …]
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| D | CodeGenSchedule.cpp | 993 RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in mutuallyExclusive() local
994 for (RecIter VI = Variants.begin(), VE = Variants.end(); VI != VE; ++VI) { in mutuallyExclusive()
1063 std::vector<TransVariant> Variants; in getIntersectingVariants() local
1073 Variants.push_back(TransVariant(*RI, SchedRW.Index, VarProcIdx, 0)); in getIntersectingVariants()
1093 Variants.push_back(TransVariant(*RI, AliasRW.Index, AliasProcIdx, 0)); in getIntersectingVariants()
1096 Variants.push_back( in getIntersectingVariants()
1102 for (unsigned VIdx = 0, VEnd = Variants.size(); VIdx != VEnd; ++VIdx) { in getIntersectingVariants()
1103 TransVariant &Variant = Variants[VIdx]; in getIntersectingVariants()
1107 if (ProcIndices[0] && Variants[VIdx].ProcIdx) { in getIntersectingVariants()
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| /external/autotest/server/site_tests/hardware_StorageStress/ |
| D | control.stress3 | 14 Variants of the test are run to simulate a number of scenarios while execising
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| D | control.stress | 14 Variants of the test are run to simulate a number of scenarios while execising
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| D | control.stress2 | 14 Variants of the test are run to simulate a number of scenarios while execising
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineScheduler.cpp | 1833 …d::vector<std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant>> Variants = { in schedule() local
1843 for (std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant> v : Variants) { in schedule()
1852 …d::vector<std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant>> Variants = { in schedule() local
1862 for (std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant> v : Variants) { in schedule()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineScheduler.cpp | 1980 Variants[] = { in schedule() local
1990 for (std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant> v : Variants) { in schedule()
2001 Variants[] = { in schedule() local
2011 for (std::pair<SISchedulerBlockCreatorVariant, SISchedulerBlockSchedulerVariant> v : Variants) { in schedule()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2184 static const unsigned Variants[] = {AMDGPUAsmVariants::DEFAULT}; in getMatchedVariants() local
2185 return makeArrayRef(Variants); in getMatchedVariants()
2189 static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3}; in getMatchedVariants() local
2190 return makeArrayRef(Variants); in getMatchedVariants()
2194 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA, in getMatchedVariants() local
2196 return makeArrayRef(Variants); in getMatchedVariants()
2200 static const unsigned Variants[] = {AMDGPUAsmVariants::DPP}; in getMatchedVariants() local
2201 return makeArrayRef(Variants); in getMatchedVariants()
2204 static const unsigned Variants[] = { in getMatchedVariants() local
2209 return makeArrayRef(Variants); in getMatchedVariants()
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