Searched refs:VecIns (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 14499 SmallVector<SDValue, 8> VecIns; in LowerVectorAllZeroTest() local
14539 VecIns.push_back(ExtractedFromVec); in LowerVectorAllZeroTest()
14559 for (unsigned i = 0, e = VecIns.size(); i < e; ++i) in LowerVectorAllZeroTest()
14560 VecIns[i] = DAG.getBitcast(TestVT, VecIns[i]); in LowerVectorAllZeroTest()
14563 for (unsigned Slot = 0, e = VecIns.size(); e - Slot > 1; Slot += 2, e += 1) { in LowerVectorAllZeroTest()
14566 SDValue LHS = VecIns[Slot]; in LowerVectorAllZeroTest()
14567 SDValue RHS = VecIns[Slot + 1]; in LowerVectorAllZeroTest()
14568 VecIns.push_back(DAG.getNode(ISD::OR, DL, TestVT, LHS, RHS)); in LowerVectorAllZeroTest()
14572 VecIns.back(), VecIns.back()); in LowerVectorAllZeroTest()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 17589 SmallVector<SDValue, 8> VecIns; in LowerVectorAllZeroTest() local
17629 VecIns.push_back(ExtractedFromVec); in LowerVectorAllZeroTest()
17649 for (unsigned i = 0, e = VecIns.size(); i < e; ++i) in LowerVectorAllZeroTest()
17650 VecIns[i] = DAG.getBitcast(TestVT, VecIns[i]); in LowerVectorAllZeroTest()
17653 for (unsigned Slot = 0, e = VecIns.size(); e - Slot > 1; Slot += 2, e += 1) { in LowerVectorAllZeroTest()
17656 SDValue LHS = VecIns[Slot]; in LowerVectorAllZeroTest()
17657 SDValue RHS = VecIns[Slot + 1]; in LowerVectorAllZeroTest()
17658 VecIns.push_back(DAG.getNode(ISD::OR, DL, TestVT, LHS, RHS)); in LowerVectorAllZeroTest()
17662 VecIns.back(), VecIns.back()); in LowerVectorAllZeroTest()
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