Searched refs:VecLd (Results 1 – 3 of 3) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMParallelDSP.cpp | 62 MemInstList VecLd; // List of all load instructions. member
375 if (AreSequentialLoads(Ld0, Ld1, PMul0->VecLd) && in CreateParallelMACPairs()
376 AreSequentialLoads(Ld2, Ld3, PMul1->VecLd)) { in CreateParallelMACPairs()
394 auto *VecLd0 = cast<LoadInst>(Pair.first->VecLd[0]); in InsertParallelMACs()
395 auto *VecLd1 = cast<LoadInst>(Pair.second->VecLd[0]); in InsertParallelMACs()
633 LoadInst **VecLd) { in CreateLoadIns() argument
635 const unsigned AddrSpace = (*VecLd)->getPointerAddressSpace(); in CreateLoadIns()
637 Value *VecPtr = IRB.CreateBitCast((*VecLd)->getPointerOperand(), in CreateLoadIns()
639 *VecLd = IRB.CreateAlignedLoad(VecPtr, (*VecLd)->getAlignment()); in CreateLoadIns()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 28936 SDValue VecLd = DAG.getLoad(VT, DL, ML->getChain(), ML->getBasePtr(), in combineMaskedLoadConstantMask() local
28938 SDValue Blend = DAG.getSelect(DL, VT, ML->getMask(), VecLd, ML->getSrc0()); in combineMaskedLoadConstantMask()
28939 return DCI.CombineTo(ML, Blend, VecLd.getValue(1), true); in combineMaskedLoadConstantMask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 35777 SDValue VecLd = DAG.getLoad(VT, DL, ML->getChain(), ML->getBasePtr(), in combineMaskedLoadConstantMask() local
35779 SDValue Blend = DAG.getSelect(DL, VT, ML->getMask(), VecLd, ML->getSrc0()); in combineMaskedLoadConstantMask()
35780 return DCI.CombineTo(ML, Blend, VecLd.getValue(1), true); in combineMaskedLoadConstantMask()
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